How to view the source code of software or operating systems (such as Linux) that open source code

For details about how to view the source code of software or operating systems (such as Linux) that expose source code-Linux general technology-Linux programming and kernel information, see the following. The Linux Kernel configuration system consists of three parts:

Makefile: Makefile distributed in the source code of the Linux kernel, which defines the compiling rules of the Linux kernel;

Config. in: provides you with the configuration selection function;

Configuration tool: includes the configuration command interpreter (explains the configuration commands used in the configuration script) and configure the user interface (the user configuration interface based on the Character interface, the Ncurses-based GUI, And the Xwindows-based GUI, corresponding to Make config, Make menuconfig, and make xconfig ).

These configuration tools are all written in scripting languages, such as Tcl/TK and Perl (including some code written in C ). This document does not analyze the Configuration System, but describes how to use the configuration system. Therefore, unless it is the maintainer of the Configuration System, General kernel developers do not need to understand their principles. They only need to know how to compile Makefile and configuration file. Therefore, in this article, we will only discuss Makefile and configuration file. In addition, we take ARM as an example for all the content related to the specific CPU architecture. In this way, we can not only clarify the problems discussed, but also have no impact on the content itself.

2. Makefile

2.1 Makefile Overview

Makefile is used to construct a list of source files to be compiled based on the configuration, compile them separately, and link the target code together to form a Linux kernel binary file.

Since the Linux kernel source code is organized in a tree structure, Makefile is also distributed in the directory tree. Makefile in Linux kernel and files directly related to Makefile include:

Makefile: the top-level Makefile, which is the overall control file for Kernel configuration and compilation.

. Config: The Kernel configuration file, including the configuration options selected by the user, used to store the Kernel configuration results (such as make config ).

Arch/*/Makefile: Makefile located in various CPU system directories, such as arch/arm/Makefile, is a Makefile for a specific platform.

Makefile under each subdirectory: for example, drivers/Makefile, responsible for managing the source code under the subdirectory.

Rules. make: Rule file, used by all makefiles.

After you use make config to configure, A. config is generated. Select the configuration for reading the top-level Makefile into. config. The top-level Makefile has two main tasks: generate the vmlinux file and the kernel module ). To achieve this, the top-level Makefile recursively enters each subdirectory of the kernel and calls Makefile in these subdirectories respectively. The subdirectories are determined by the Kernel configuration. In the top-level Makefile, include arch/$ (ARCH)/Makefile, which contains Makefile under the specific CPU architecture. This Makefile contains platform-related information.

Makefile in each subdirectory is also based on. the configuration information provided by config constructs the list of source files required for the current configuration, and includes $ (TOPDIR)/Rules at the end of the file. make.

The Rules. make file plays an important role in defining the compilation Rules shared by all makefiles. For example, if you need to compile all c Programs in the current directory into assembly code, you need to have the following compilation rules in Makefile:

%. S: %. c
$ (CC) $ (CFLAGS)-S $ <-o $ @

Many Sub-directories have the same requirements, so you need to include this compilation rule in their makefiles, Which is troublesome. In Linux, such compilation Rules are uniformly placed in Rules. make, and include the Rules in their makefiles. make (include Rules. make) to avoid repeating the same rules in multiple makefiles. For the above example, the rule in Rules. make is:

%. S: %. c
$ (CC) $ (CFLAGS) $ (EXTRA_CFLAGS) $ (CFLAGS _ $ (* F) $ (CFLAGS _ $ @)-S $ <-o $ @

2.2 variables in Makefile

The top-level Makefile defines and outputs many variables to the environment, and transmits some information to makefiles in each subdirectory. Some variables, such as SUBDIRS, are defined in the top-level Makefile and assigned the initial values. They are also expanded in arch/*/Makefile.

Common variables include the following types:

1) version information

VERSION information includes: VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION, and KERNELRELEASE. VERSION Information defines the current kernel VERSION, such as VERSION = 2, PATCHLEVEL = 4, SUBLEVEL = 18, EXATAVERSION =-rmk7, which together constitute the kernel release version kernelrelease: 2.4.18-rmk7

2) CPU architecture: ARCH

At the beginning of the Makefile on the top layer, ARCH is used to define the architecture of the target CPU, such as ARCH: = arm. In Makefile of many sub-directories, You must select the list of source files to be compiled according to the ARCH definition.

3) path information: TOPDIR, SUBDIRS

TOPDIR defines the root directory of the Linux kernel source code. For example, Makefile in each subdirectory can locate Rules. make by using $ (TOPDIR)/Rules. make.

SUBDIRS defines a directory list. When compiling a kernel or module, the top-level Makefile determines which subdirectories to enter based on SUBDIRS. The value of SUBDIRS depends on the kernel configuration. In the top-level Makefile, the value of SUBDIRS is kernel drivers mm fs net ipc lib. According to the kernel configuration, the value of SUBDIRS is expanded in arch/*/Makefile. See the example in 4.

4) kernel composition information: HEAD, CORE_FILES, NETWORKS, DRIVERS, LIBS

The vmlinux Kernel File is generated by the following rules:

Vmlinux: $ (CONFIGURATION) init/main. o init/version. o linuxsubdirs
$ (LD) $ (LINKFLAGS) $ (HEAD) init/main. o init/version. o
-- Start-group
$ (CORE_FILES)
$ (DRIVERS)
$ (NETWORKS)
$ (LIBS)
-- End-group
-O vmlinux

We can see that vmlinux is composed of HEAD, main. o, version. o, CORE_FILES, DRIVERS, NETWORKS, and LIBS. These variables (such as HEAD) are used to define the target file and library file list generated by the connection in vmlinux. The HEAD is defined in arch/*/Makefile to determine the list of files first linked to vmlinux. For example, for the CPU Of the ARM Series, the HEAD is defined:

HEAD: = arch/arm/kernel/head-$ (PROCESSOR). o
Arch/arm/kernel/init_task.o

It indicates that head-$ (PROCESSOR). o and init_task.o must be first linked to vmlinux. PROCESSOR is armv or armo, depending on the target CPU. CORE_FILES, NETWORK, DRIVERS, and LIBS are defined in the top-level Makefile, and are expanded by arch/*/Makefile as needed. CORE_FILES corresponds to the core file of the kernel, including kernel/kernel. o, mm/mm. o, fs/fs. o, ipc/ipc. o, we can see that these are the most important files in the kernel. In addition, arch/arm/Makefile expands CORE_FILES:

# Arch/arm/Makefile
# If we have a machine-specific directory, then include it in the build.
MACHDIR: = arch/arm/mach-$ (MACHINE)
Ifeq ($ (MACHDIR), $ (wildcard $ (MACHDIR )))
SUBDIRS + = $ (MACHDIR)
CORE_FILES: = $ (MACHDIR)/$ (MACHINE). o $ (CORE_FILES)
Endif

HEAD: = arch/arm/kernel/head-$ (PROCESSOR). o
Arch/arm/kernel/init_task.o
SUBDIRS + = arch/arm/kernel arch/arm/mm arch/arm/lib arch/arm/nwfpe
CORE_FILES: = arch/arm/kernel. o arch/arm/mm. o $ (CORE_FILES)
LIBS: = arch/arm/lib. a $ (LIBS)

5) Compilation information: CPP, CC, AS, LD, AR, CFLAGS, LINKFLAGS

In Rules. make, general compilation Rules are defined. In specific scenarios, the compilation environment must be clearly defined. The compilation environment is defined in the preceding variables. CROSS_COMPILE is defined for cross-compilation requirements. For example:

CROSS_COMPILE = arm-linux-
CC = $ (CROSS_COMPILE) gcc
LD = $ (CROSS_COMPILE) ld
......

CROSS_COMPILE defines the prefix of the Cross-compiler arm-linux-, indicating that all the cross-compiler tools start with arm-linux-. Therefore, before each cross-compiler tool, $ (CROSS_COMPILE) is added to form a complete cross-compilation tool file name, such as arm-linux-gcc.

CFLAGS defines the parameters passed to the C compiler.

LINKFLAGS is the parameter used by the linker when the link is used to generate vmlinux. LINKFLAGS are defined in arm/*/Makefile, for example:

# Arch/arm/Makefile
LINKFLAGS: =-p-X-T arch/arm/vmlinux. lds

6) configure the variable CONFIG _*

The. config file contains many configuration variable equations to describe the user configuration results. For example, CONFIG_MODULES = y indicates that the module function of the Linux kernel is selected.

. After being contained by the top-level Makefile, many configuration variables are formed. Each configuration variable has a fixed value: y indicates that the kernel code corresponding to the current compilation option is statically compiled into the Linux kernel; m indicates that the kernel code corresponding to the current compilation option is compiled into a module. n indicates that this compilation option is not selected. If no selection is made, the value of the configuration variable is null.

2.3 Rules. make variable

As mentioned above, Rules. make is the compilation rule file, and all makefiles will include Rules. make. The Rules. make file defines many variables. The most important is the compilation and link list variables.

O_OBJS, L_OBJS, OX_OBJS, and LX_OBJS: the target file list of the Linux kernel vmlinux needs to be compiled in this directory. "X" in OX_OBJS and LX_OBJS indicates that the target file uses the EXPORT_SYMBOL output symbol.

M_OBJS, MX_OBJS: the target file list under the local directory that needs to be compiled into a loadable module. Similarly, "X" in MX_OBJS indicates that the target file uses the EXPORT_SYMBOL output symbol.

O_TARGET, L_TARGET: Each subdirectory has an O_TARGET or L_TARGET, Rules. make first generates all the target files in O_OBJS and OX_OBJS from the source code compilation, and then uses $ (LD)-r to link them into an O_TARGET or L_TARGET. O_TARGET ends with. o, while L_TARGET ends with..