Internal bus from PC bus to arm

Bus Evolution
First, let's talk about the evolution of the bus. PC architecture series: the development history of CPU, ram, and Io bus.
This article is well written! Thank you for the author!
The following content is largely from this article, which can be said to be the reduction and reproduction of this article.

Public Bus

In the early PC, CPU, ram, and I/O were all attached to a bus, and all components had to work in synchronous mode. In this way, a "Lock" (locked to each other) is introduced)
Effect: All devices are limited to a clock frequency (clock frequency). The speed of the entire system is limited by the slowest device in the system, and the overall performance of the system cannot be improved.

The birth of nanqiao (I/


O-bus was born
)

1987
Company Compaq came up with a solution:
Separate the system bus from the I/O bus so that two different buses work at different clock frequencies. CPU and memory work on the system bus (the system
Is independent of all I/O devices. In this way, high-speed CPU/Ram components are free from the limitations of low-speed I/O devices.

The bridge here is the current South Bridge
(South Bridge)
Chip
And it actually played the role of downgrading.

Frequency Doubling

Open from 80486
Beginning, the CPU is developing rapidly, and the frequency is increasing significantly. Memory began to keep up with the pace of CPU development. Intel decided to introduce frequency doubling (clock) in 80486.
Doubler. The memory still works on the system bus and maintains the same operating frequency as the system bus. The CPU internal operating frequency (CPU clock speed) is:

CPU clock speed = External frequency (system bus frequency) * Frequency Doubling (clock Doubler)

The birth of beiqiao and frontend Bus

The changing trend of the PC structure is to put low-speed Devices
And high-speed Devices
Use the isolated bus method for isolation. Later on, the North Bridge Chip was developed.
. The bus between memory and Northbridge is called the memory bus.
To convert the bus connecting the CPU and the North Bridge to the front-end bus.
(Front side bus, FSB ),
That is, the system bus.
(System Bus
)!

I/O bus in PC



Through the above article, we know the evolution of the bus. I/O bus.

Bus: the constructor used to transmit signals or energy.

The system I/O bus transmits commands from memory to the input/output processor (IOP)
The connected device. The system I/O bus also transmits commands from IOP back to the memory.

Understanding physical I/O components-host I/O bus (1)
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After the data leaves the system memory bus, it is usually transmitted to another bus: host I/O bus. At present, the most common host I/O bus is the p c I bus, in addition to PCI-E bus, ISA bus, e I s a bus and V M E bus and so on. The host I/O bus provides several important functions, including:

Allow new plug-in cards. Allow input and output data from the memory bus. Allows data transmission between plug-in cards .

The host I/O bus is not the only intermediary between the device and the system memory bus, there is also a bridge controller chip (nanqiao) between the host I/O bus and the system memory bus, which is responsible for exchanging data between the two bus.

The host I/O bus is a tool for transferring data between the memory and peripherals.

Internal bus of ARM processor

After carefully studying the architecture of arm9-based on S3C2410, you will find that, as a high-performance embedded CPU, arm9-can be regarded as a highly concentrated computer system, similar to a computer architecture that splits the nanqiao chip into a multiplier! For details, see:

 

After reading this, we should be able to have some knowledge of the computer's bus. More importantly, we should have a better understanding of the arm9-'s system architecture! It is worth noting that the memory chip of arm is not directly connected to the "memory bus", but indirectly connected to the "memory bus" through the memory controller.
If you are interested in more in-depth study of the arm bus structure, we recommend that you take a look at the reference materials I mentioned above:
Introduction to AMBA, AHB, and APB bus and introduction to AMBA bus system

. I am not talking about this nonsense, because they have been very comprehensive and wonderful. If you are an arm bus designer, you should check
Arm's
AMBA specification (rev2.0)

<G id = "1"> documentation </G> ).