Interrupt Controller and interrupt control

Source: Internet
Author: User

All exceptions of ARM-based processors are divided into seven groups. Each type of exception corresponds to an exception vector. Each exception vector occupies 4 bytes, indicating the entry address of the interrupt service program. Abnormal vector table from 0x00000000 ~ 0x0000001f.

The vector addresses of normal and fast interruptions are 0x00000018 ~ 0x0000001b, 0x0000001c, and 0x0000001f. For each ARM chip, apart from kernel exceptions, there are also various built-in hardware component interruptions. The interrupt vectors of these interrupt sources correspond to IRQ or FIQ, which can be determined by setting the mode register.

The interrupt source can be an interrupt source with sub-registers and an interrupt source without sub-registers. The requested status (suspended) is displayed when an interrupt request is sent) it will be recorded in the corresponding pending register (the interrupt records with the word register are in subsrcpnd, And the Request status of the interrupt source without the sub-register is recorded in srpnd. If the mask register (submask/intmask) is not blocked. If the mask register (submask/intmask) does not mask the specified interrupt source, the corresponding mode register intmod determines whether to use normal interrupt IRQ or fast interrupt FIQ, if IRQ is selected, the priority level should also be determined. If IRQ is selected, the highest priority interrupt source will cause an interruption.



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