Interrupt handling process

Source: Internet
Author: User

A complete interrupt handling process should include: interrupt request, interrupt queuing or interrupt determination, interrupt response, interrupt processing and interrupt return.
1. Request interruption
The interrupt request signal is sent from the interrupt source to the CPU. When an external device sends an interrupt request, the following two conditions must be met:
(1) the work of external devices has come to an end. For example, the input device can send an interrupt request to the CPU only after the input data is sent to the data register of the interface circuit (that is, the data to be input is prepared.
(2) The system allows the peripheral device to send an interrupt request. If the system does not allow the peripheral to send an interrupt request, the request of the peripheral can be blocked. When the peripheral interrupt request is blocked, the interrupt request cannot be sent even though the peripheral preparation is complete.
2. Interrupt the queue
The interrupt request is random. Sometimes multiple interrupt sources submit an interrupt request at the same time. However, the CPU can only respond to a single source disconnection request at a time. Which interrupt source request is the first response? In this case, a priority order must be pre-arranged based on the priorities of the work nature of each interrupt source. When multiple interrupt sources request an interrupt at the same time, they queue in this order of priority, wait for CPU processing. Generally, the most urgent and fast devices are placed at the highest priority. The CPU first responds to the highest-priority interrupt source. When the interrupt processing is complete, the system then responds to the application for a low-level interrupt.
You can use hardware or software to interrupt the queue. The former is fast, but hard devices need to be added. The latter does not need to add hard devices, but is slow, especially when many interrupt sources exist.
The query technology is used for software optimization. When the CPU response is interrupted, you can use a software query to determine which peripherals requested to be interrupted and determine their priority. A typical software priority queuing interface circuit is as follows:Figure 6-10As shown in the following figure, the interrupt request trigger of the eight peripherals is combined as a port and assigned a device number. After the interrupt request signal of each peripheral is "or", it is used as the intr signal. Therefore, if any peripheral has an interrupt request, the intr signal can be sent to the CPU. When the CPU responds to the interruption, the status of the interrupt register is read into the CPU as a peripheral, and their status is checked by bit. If the status of the interrupt register is 1, the peripheral device corresponding to this bit has an interrupt request and should go to the corresponding endpoint of the service program. The process is shown in 6-11.

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