Interrupt in Chapter 12th
Generation of interruptions within 12.1
Division Error: 0, indicating a departure error. For example, the Division overflow generated by executing the div command;
One-step execution: 1;
Execute the into command: 4;
Execute the int command. The format of this command is int n, and n in the command is the byte immediate number, which is the interrupt type code of the provided CPU.
12.2 interrupt handling program
After receiving the interrupt information, the CPU should switch to the processing program for the interrupt information.
12.3 interrupted vector table
The CPU uses an 8-bit interrupt type code to locate the corresponding interrupt handler entry address through the interrupt vector table. The interrupt vector table is the list of Interrupt vectors. The so-called interrupt vector is the entry address of the interrupt processing program. Expand, the interrupt vector table is the list of the interrupt handler entry addresses.
The interrupt vector table is stored in the memory. For an 8086PC machine, the interrupt vector table is stored at the memory address 0. The interrupt vector table is stored in the 0000 units from memory to 1024: 03FF.
In the interrupt vector table, for 8086CPU, one table item occupies two words, the high address Word storage segment address, and the low address Word storage offset address.
12.4 Interruption Process
After the CPU receives the interrupt information, it must process the interrupt information. After the hardware is interrupted, CS: IP points to the entry of the interrupt handler, And the CPU starts to execute the interrupt handler.
The following is the process of interruption caused by the 8086CPU when it receives the interrupt message.
12.5 interrupt handling program and iret command
The preparation method of the interrupt processing program is similar to that of the subprogram. The following is a general procedure:
1. Save the registers used
2. Handling interruptions
3. Recover the registers used
4. Use the iret command to return
The functions of the Iret command are described in assembly syntax as follows:
POP IP
POP CS
Popf
Iret is usually used in combination with the interrupt handling process automatically completed by the hardware. As you can see, during the interruption process, the order of register entry to stack is to mark registers, CS, and IP, while the order of register entry to stack is IP, CS, and Mark register.
After the Iret command is completed, the CPU returns to the execution point before the interrupt processing program is executed and continues to execute the program.
12.6 handling of departure error interruptions
The following code snippet causes a division overflow error.
Mov ax, 1000 h
Mov bh, 1
Div bh
12.7 program to handle the interruption of the 0th digit.
12.11 one-step interruption
12.12 respond to special interruptions
The complete code below shows how to customize an exception handling program.
Assume cs: code
Code segment
Start:
Mov ax, cs
Mov ds, ax
Mov si, offset do0; Set ds: si to point to source address
Mov ax, 0
Mov es, ax
Mov di, 200 h; Set es: di to target address
Mov cx, offset do0end-offset do0; Set cx to Transfer Length
Cld; set the transmission length to positive
Rep movsb
Mov ax, 0; interrupt vector table set below
Mov es, ax
Mov word ptr es: [0], 200 h
Mov word ptr es: [2], 0
Mov ax, 4c 00 h
Int 21 h
Do0: jmp short do0start
Db "overflow! "
Do0start: mov ax, cs
Mov ds, ax
Mov si, 202 h; Set ds: si to point to string
Mov ax, 0b800h
Mov es, ax
Mov di, 12*160 + 36*2; Set es: di to the center of the video storage space
Mov cx, 9; Set cx to String Length
S: mov al, [si]
Mov es: [di], al
Inc si
Add di, 2
Loop s
Mov ax, 4c 00 h
Int 21 h
Do0end: nop
Code ends
End start
Copy the preceding code to the p77.txt file and compile it. Then, a division exception is thrown, and overflow is displayed in the middle of the screen! String.