Introduction to arm Common Assembly instructions

B Jump Instruction (jump range is 32Mb)

BL with return address of the jump, instruction automatically copy the address of the next instruction to the R14 register, and then jump to the specified address to execute, after the execution of the return to the next command to execute

PC Register R15, program counter points to the currently executing program address

LR Register R14, link Register store return address when the program jumps

LDR read data from memory loaded into register

STR saves the data in the register to memory

The data transfer instruction between the MOV register and the register can also pass the immediate number to the target register

Add addition instruction

Sub subtraction Instruction

Bic bit Cleanup Instructions

Orr Logical OR operational instructions

CMP comparison directives

TST Bit test Instruction

CPSR Program Status register (switch processor operating mode, switch interrupt)
(This register can only be read and written with the Mrs and MSR instructions)

SPSR the state of the program to save the state of the CPSR so that when the exception returns, the working state of the recovery exception occurs.
(This register can only be read and written with the Mrs and MSR instructions)

Mrs Read program status register instruction

MSR Write Program Status Register directive

Coprocessor Access directives:

In the RAM system, the coprocessor CP15 is primarily used for storage management, and the CP15 contains 16 32-bit registers, which are numbered C0 to C15.

Data transfer instructions for MRC coprocessor to arm registers
Example: MRC p15,0,r0,c1,c0,0 (the data in the Coprocessor C1 is read into the ARM processor R0)

MCR Arm Register to coprocessor register data transfer Instructions
Example: MCR p15,0,r0,c1,c0,0 (writes data from ARM processor R0 to coprocessor R0)

Introduction to arm Common Assembly instructions