I/O driver related _ raw_readl and _ raw_writel

1. s3c2410_gpb5 is the port number, defined in regs-gpio.h,

# Define s3c2410_gpio_bankb (32*1)

# Define s3c2410_gpiono (bank, offset) (bank) + (offset ))

# Define s3c2410_gpb5 s3c2410_gpiono (s3c2410_gpio_bankb, 5)

There are a total of 130 gpios In the S3C2410, which are divided into 9 groups (GPA ~ Gpj), each group can have up to 32, and each gpio has 2 ~ Four optional functions. Each group has four control registers, for example, gpbcon, gpbdat, gpbup, and reserved, they are function configuration, data cache, up-pull enabling, and retained.

The above s3c2410_gpb5 is the gpio number, that is, in the number space (0 ~ 32*9-1), the bank is the group's base number, and the offset is the intra-group offset.. (That is to say, all Io ports are uniformly numbered from 0, for example, s3c2410_gpa0 = 0, s3c2410_gpa1 = 1, s3c2410_gpb0 = 32, and s3c2410_gpc0 = 48)

2. s3c2410_gpb5_outp is port function, defined in regs-gpio.h,

# Define s3c2410_gpb5_indium (0x00 <10)

# Define s3c2410_gpb5_outp (0x01 <10)

Two gpbcon 10th and 11 are used to configure the gpb5 function, 00 = input, 01 = Output

3. operation functions of gpio on S3C2410

In the hardware. h file, there are:


S3c2410_gpio_cfgpin // configure the gpio function of the port

S3c2410_gpio_getcfg // READ function configuration

S3c2410_gpio_pullup // configure the pull-up resistance.

S3c2410_modify_miscr // miscellaneous Configuration

S3c2410_gpio_getirq // convert the specified port to the IRQ

S3c2410_gpio_irqfilter // configure IRQ filter enabling or not

S3c2410_gpio_setpin // write data to the port

S3c2410_gpio_getpin // read data from the port

These functions are implemented in gpio. h.

Void s3c2410_gpio_setpin (unsigned int pin, unsigned int)

{

Void _ iomem * base = s3c2410_gpio_base (PIN );//Calculate the virtual base address of the port group, for example: // GPA = 0xf0e00000

// GPB = 0xf0e00010

Unsigned long offs = s3c2410_gpio_offset (PIN );// Calculate the offset (0 ~ 31)

Unsigned long flags;

Unsigned long dat;

Local_irq_save (flags );

Dat = _ raw_readl (base + 0x04 );// Add 0x04 to the virtual base address as the GP * dat register and 0x00 to the GP * on register.

// Read the value of the current GP * dat register

Dat & = ~ (1 <offs );// Reset the positions in the register based on the offs offset, and keep the other bits unchanged.

Dat | = to <offs;// Perform bitwise operations on the required bit based on the parameter to configure a specific IO port
_ Raw_writel (dat, base + 0x04 );// Write the configuration to the Register (this is a virtual address)

Local_irq_restore (flags );

}

4. s3c2410_gpio_base and s3c2410_gpio_offset are also defined in the regs-gpio.h file,

# Define s3c2410_gpio_base (PIN )&~ 31)> 1) + s3c24xx_va_gpio)

# Define s3c2410_gpio_offset (PIN) & 31)

In map. h, there are:

/* Gpio ports */

# Define s3c24xx_va_gpio s3c2410_addr (0x00e00000) // virtual address s3c24xx_va_gpio = 0xf0e00000

# Define s3c2400_pa_gpio (0x15600000)

# Define s3c2410_pa_gpio (0x56000000) // gpacon physical address

# Define s3c24xx_sz_gpio sz_1m // 0x100000 = 1024*1024

S3c2410_gpio_baseRole:The root data port number pin to calculate the virtual base address of the port group. (PIN )&~ 31) is to remove the zero header less than or equal to 31 in the PIN (clear 0 low 5 Bit),> 1 is because each group of gpio can have up to 32 ports, four hosts are required to control these ports.
Device space. The four register space requires 4*4 = 16 bytes for addressing, 32/16 = 2, and the left shift is exactly the same. That is to say, the number of the last port and the next port is 32, while the address of the control register is 16.

S3c2410_gpio_offsetRole:Calculate the offset of the port group based on the port number pin. (PIN) & 31) Remove the number greater than 31 (the number of digits greater than 6th bits ).

5. _ raw_readl and _ raw_writel

Linux operations on I/O are defined in ASM/IO. h, and the corresponding operations on the ARM platform are in ASM-arm/IO. h.

# DEFINE _ raw_readl (A) (_ chk_io_ptr (A), * (volatile unsigned int _ force *) ())

# DEFINE _ raw_writel (V, A) (_ chk_io_ptr (A), * (volatile unsigned int _ force *) (A) = (V ))

In include \ Linux \ compiler. h:

# Ifdef _ checker __

......

Extern void _ chk_io_ptr (void _ iomem *);

# Else

......

# DEFINE _ chk_io_ptr (x) (void) 0

......

# Endif

_ Raw_readl (a) expands to (void) 0, * (volatile unsigned int _ force *) ()). When _ checker _ is defined, call _ chk_io_ptr to check the address first. Otherwise, _ chk_io_ptr does nothing. * (volatile unsigned int _ force *) () that is, the value at address a is returned. (Void) XX is sometimes useful. For example, when the compiler opens a check for unused parameters, you need to get unused parameters so that
Compiled.

There are two programming methods for the physical address of CPU to I/O: one is I/O ing and the other is memory ing. _ Raw_readl and _ raw_writel are original operation I/O methods. The derived operation methods include: INB, outb, _ memcpy_fromio, readb, writeb, ioread8, and iowrite8.

6. local_irq_save and local_irq_restore

The disconnection and disconnection are defined in ASM-arm/system. h.

# Define local_irq_save (x )\

({\

_ ASM _ volatile __(\

"Mrs % 0, CPSR @ local_irq_save \ n "\

"Cpsid I "\

: "= R" (x): "Memory", "cc ");\

})

# Define local_irq_save (x )\

({\

Unsigned long temp ;\

(Void) (& temp = & X );\

_ ASM _ volatile __(\

"Mrs % 0, CPSR @ local_irq_save \ n "\

"Orr % 1, % 0, #128 \ n "\

"MSR cpsr_c, % 1 "\

: "= R" (x), "= r" (temp )\

:\

: "Memory", "cc ");\

})