Ip2041 chip serDes clock problem avoidance Solution

Source: Internet
Author: User
Tags serdes

Recently, when debugging a board, it was found that the network port cannot be pinged when the board is restarted after power loss. It uses a 2041 film. When locating the problem, it is found that the serDes register Initialization is incorrect. After the first operation, the err bit is 1 and the done bit is 0. After the CPU is reset without power loss, the err bit becomes 0, if the done bit is changed to 1, Ping is normal. According to the symptom analysis, we first eliminate the problem of the chip itself, and then compare the differences between the two boot times by starting from the chip initialization, finally, it is analyzed that there is no clock in serDes before the clock chip is initialized when the power is down (the CPU is powered by the external clock chip zl80018), so the first serDes initialization fails.

The root cause is to solve the problem. There are two solutions: hardware and software. The hardware solution is to add a crystal oscillator to provide a clock for serDes separately without using an external clock chip. The software solution is to forcibly reset serDes at the final stage of initialization, so that the RST position is 1, at this time, the clock chip can output a stable clock, and the serDes reset time is also very short, it can ensure that the network port can be pinged after the system is up.

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