Jchdl-RTL instance-andreg

Source: Internet
Author: User

Https://mp.weixin.qq.com/s/p4-379tBRYKCYBk8AZoT8A

  Input two sets of line phases and output the result to the Register.   Reference Https://github.com/wjcdx/jchdl/blob/master/src/org/jchdl/model/rtl/example/AndReg.java   1. Create andreg. Java and generate the constructor and logic () methods. Omitted   2.Add an input/output interface based on the logic Principle ?? The input and output lines exist as class members. Use annotations to indicate whether it is input port or output port.   3. Collect input and output lines in the construct () method ?? First, call the construction method of the parent class, namely the module class, to build the module hierarchy. Then, the input and output parameters correspond to the input and output ports one by one. Then call the construct () method to construct the module (call the logic () method once to collect the assign/always code block and sub-module of the module ).   4. Create the assign/always code block and sub-module in the logic () method. ?? Here is an always code block: When a change event occurs in a and B, the lambda expression method is executed to update the R value.   If the event type is the same, the following form can be used: ??   In addition, lambda expressions are supported in various forms.   5. Create an inst static method for future use Omitted   6. Create the main method for verification ?? The running result is: ??   7. Generate OpenGL Generate custom Module name: Omitted   Call the toopengl () method to generate the OpenGL implementation. Omitted   The execution result is as follows: ??  

Jchdl-RTL instance-andreg

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