Jflash-s3c2410 Linux porting)

Source: Internet
Author: User
Author: Water Cut knife
Reposted from: todaygood.cublog.cn

In fact, it cannot be called transplantation. Just modify the General jflash code to suit your own board.
Reference:
The common JTAG cable structure is relatively simple. One end is db25, which is connected to the parallel port of the computer. In the middle, 74hc244 and some resistors are used to realize level conversion (5v3. 3 V ?) (There are also relatively cumbersome solutions that only use a few 100 ohm resistors. It seems that the one I used here to burn CPLD is like this ...), the JTAG header at the other end is connected to the JTAG interface of the target board.
The parallel port db25 was originally used to connect to the printer. Its pin definition is as follows:
25 pin D-sub spp Signal Direction in/out
1/strobe in/out
2 Data 0 out
3 Data 1 out
4 Data 2 out
5 Data 3 out
6 data 4 out
7 data 5 out
8 data 6 out
9 data 7 out
10/ack in
11 busy in
12 paper out in
13 select in
14/line feed in/out
15/error in
16/init in/out
17/select in/out
18-25 ground Gnd
Visible, data line pin2 ~ Pin9 can be used to send data ~ Pin13 and so on can be used to receive data.
The JTAG data transmission mode is serial and mainly uses the following pins:
TDI (test data in)
TDO (test data out)
TCK (test clock)
TMS (test mode select)
Trst (test reset) optional.
Therefore, the DB25-JTAG actually uses only a few lines of db25. However, since all eight data lines of db25 can be used as output, various JTAG lines with Different Pin assignment appear on the market. For example, the pin assignment of Wigler:
TMS: pin3 (D1)
TCK: pin4 (D2)
TDI: pin5 (D3)
TDO: pin11 (busy)
SRST: pin2 (D0)
Trst: pin6 (D4)
(Refer to the circuit diagram of Wigler, but the last nsst and ntrst may not be used, and the definition in the H-JTAG is different, trst is pin2, no SRST)
There is another method in the H-JTAG-STD, defined as follows:
TMS: pin3 (D1)
TCK: pin2 (D0)
TDI: pin8 (D6)
TDO: pin13 (select)
SRST: N/
Trst: pin4 (D2)
The program sjf2410 of the S3C2410 program is used:
TCK: pin2 (D0)
TDI: pin3 (D1)
TMS: pin4 (D2)
TDO: pin11 (busy)
This can be seen in the JTAG. h file in the source code.
In addition to the pin assignment of db25, JTAG ctor has several standards, including 20pin, 14pin, 12pin, and 10pin. Here a piece of arm9-development board with the DB25-JTAG Conversion Board is very fun, the above is only a piece of 244, but there are three 20pin interfaces wigggler, STD, S3C2410. Because the pin assignment of 20 PIN ctor Ctor is fixed, the three interfaces correspond to three interfaces on the db25 side. Therefore, the Development Board can select different interfaces based on different programs running on the PC.
20pin connector is defined as follows (refer to this figure ):
VCC 1 2 nC
Ntrst 3 4 Gnd
TDI 5 6 Gnd
TMS 7 8 Gnd
TCK 9 10 Gnd
Gnd 11 12 Gnd
TDO 13 14 Gnd
Nreset 15 16 Gnd
NC 17 18 Gnd
NC 19 20 Gnd
14pin:
Ntrst 1 2 Gnd
TDI 3 4 Gnd
TDO 5 6 Gnd
TMS 7 8 Gnd
TCK 9 10 Gnd
Nsst 11 12 N/
Dint 13 14 VCC
(Dint pin is used to raise debug interrupt. Too chips has no this pin .)
12pin:
Ntrst 1 2 Gnd
TDI 3 4 Gnd
TDO 5 6 Gnd
TMS 7 8 Gnd
TCK 9 10 Gnd
Nsst 11 12 Gnd
10pin:
TCK 1 2 VCC
TDI 3 4 VCC
TDO 5 6 Gnd
TMS 7 8 Gnd
Ntrst 9 10 Gnd
About the JTAG signal, on the H-JTAG home page provides a document, which has this introduction:
...... Next, let's start with TAP (Test Access port.
Tap is a common port that allows you to access all data registers (DR) and command registers (IR) provided by the chip ). The control of the entire tap is done through the TAP controller. A total of five signal interfaces (TCK, TMS, TDI, TDO, and trst) are available for the TAP. Four of them are the input signal interface and the other are the output signal interface. Generally, the development board we see has a JTAG interface. The main signal interface of this JTAG interface is the five. Next, I will first introduce these five interface signals and their functions.
Test clock input (TCK)
TCK provides an independent and basic clock signal for the operations of the TAP. All operations of the TAP are driven by the clock signal. TCK is mandatory in the IEEE 1149.1 standard.
Test Mode Selection input (TMS)
The TMS signal is used to control the switching of the TAP state machine. The TMS signal can be used to control the switch between different States of the TAP. The TMS signal is valid on the rising edge of the TCK. TMS are mandatory in the IEEE 1149.1 standard.
Test data input (TDI)
TDI is the data input interface. All data to be input to a specific register is input in a single serial position (driven by TCK) through the TDI interface ). TDI is mandatory in the IEEE 1149.1 standard.
Test data output (TDO)
TDO is the data output interface. All data to be output from a specific register is output in a single serial position (driven by TCK) through the TDO interface ). TDO is mandatory in the IEEE 1149.1 standard.
Test reset input (trst)
Trst can be used to reset (initialize) the TAP controller ). However, this signal interface is optional in the IEEE 1149.1 standard and is not mandatory. Because you can reset (initialize) the TAP controller through TMS ).
In fact, the general process of accessing the data register (DR) through the tap interface is:
1. Select a data register to be accessed through the instruction register (IR;
2. Connect the selected data register to the between TDI and TDO;
3. Driven by TCK, the required data is input to the selected data register through TDI, and the data in the selected data register is read through TDO.
In addition, the definition of the optional signal nsst is as follows (see reference 1 ):
Nsst is a "system reset" signal and acts like conventional "reset' button.
References:
[1] http://www.linux-mips.org/wiki/JTAG
[2] http://en.wikipedia.org/wiki/Jtag
[3] http://docwiki.gumstix.org/JTAG
[4] http://wiki.openwrt.org/OpenWrtDocs/Customizing/Hardware/JTAG_Cable
[5] http://www.bluewaternz.com/corporate/uni/unikit/jtag/
The reason why the JTAG interfaces of various board subsidiaries on the market are 20 PIN, 10pin, 12pin, and 14pin. Read more
Litron documentation, http://blog.chinaunix.net/u/23070/showart.php? Id = 157735
Modified the JTAG. h file.
// Pin connections
// TCK: Data [0] (2) // my is 4 data [2]
// TDI: Data [1] (3) // my is 5 data [3]
// TMS: Data [2] (4) // my is 3 data [1]
// TDO: status [7] (11)
// # Define tck_h 0x01
# Define tck_h 0x04
// # Define tdi_h 0x02
# Define tdi_h 0x08
// # Define tms_h 0x04
# Define tms_h 0x02
Compile, burn,
[Root @ hujunlinux jflash] #./Jflash-s3c2410 Vivi/T = 5

+ ------------------------------------ +
| Sec JTAG flash (SJF) V 0.11 +
| Modified by mizi 2002.7.13 +
+ ------------------------------------ +
> Flashtype = 5
> S3C2410X (ID = 0x0032409d) is detected.
> K9s1208 is detected. ID = 0xec76

K9s1208 NAND Flash JTAG programmer vers 0.0
0: k9s1208 program 1: k9s1208 PR blkpage 2: Exit

Select the function to test: 0

[SMC (k9s1208) NAND flash writing program]

Source size: 0x13a53

Available target block number: 0 ~ 4095
Input target block number: 0
Target start block number = 0
Target size (0x4000 * n) = 0x14000
Status: epppppppppppppppppppppppppppppppppppppp
Epppppppppppppppppppppppppppppppppppp
Epppppppppppppppppppppppppppppppppppp
Epppppppppppppppppppppppppppppppppppp
Epppppppppppppppppppppppppppppppppppp

K9s1208 NAND Flash JTAG programmer vers 0.0
0: k9s1208 program 1: k9s1208 PR blkpage 2: Exit

Select the function to test: 2
Jflash can be burned and written, but after VIVI is burned in, minicom is run, and no serial port is output, but it is used in windows.
Run sjf2410 and write the same Vivi,
I encountered this problem because after I wrote Vivi,
If the power supply is not disabled, open the Board again. Just press the reset button on the board and close it again. Then, the startup information of VIVI is displayed on the serial port.
Here we provide my jflash source code,
It indicates that the JTAG of Wigler is suitable for use,
// TCK: Data [0] (2) // my is 4 data [2]
// TDI: Data [1] (3) // my is 5 data [3]
// TMS: Data [2] (4) // my is 3 data [1]
It means TCK-> pin4, that is, data [2], should be the pin2-pin9 of the data, so pin2 is data [0]
And so on TDI and TMS. TDO uses pin11, because the TDO of my JTAG is the same as that of litron,
Pin11.

File:
Jflash-s3c2410_linux.tar.bz2
Size:
8 KB
 

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