Knowledge about arm Bus

Overview of AMBA, AHB, and APB bus Author: adamzhao Date: 19:33:00

About AMBA

with the development of deep sub-micron technology, the scale of Integrated Circuit chips is growing. From Time Series-driven design method to IP address reuse-based design method, digital IC has been widely used in SoC design. In the SOC design based on IP address multiplexing, on-chip bus design is the most critical issue. Therefore, many on-chip bus standards have emerged in the industry. Among them, the AMBA On-Chip Bus launched by arm has been favored by the majority of IP developers and SoC system integrators, and has become a popular industrial standard on-Chip structure. AMBA specifications mainly include the AHB (Advanced High Performance Bus) system bus and the APB (Advanced Peripheral Bus) peripheral bus. EDA China portal @ g9vaz2yd; @ M
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AMBA On-Chip Bus
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AMBA 2.0 consists of four parts: AHB, ASB, APB and test methodology. AHB uses the traditional shared bus with the main module and slave module, and the interfaces and interconnection functions are separated, which is of great significance to the interconnection between modules on the chip. AMBA is not only a bus, but also an interconnection system with interface modules. Next we will briefly introduce the more important AHB and APB bus.
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On-Chip System Based on AMBA
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A typical AMBA-based system diagram 3 is shown.
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Most modules (including processors) mounted on the bus are only functional modules with a single attribute: Main module or slave module. The main module is a module that sends read/write operations to the slave module, such as CPU and DSP. The slave module is a module that accepts commands and responds to the requests, such as on-chip RAM, AHB/APB bridge. In addition, some modules have two attributes at the same time. For example, Direct Memory Access (DMA) is a slave module during programming, but it must be a master module when the system reads and transmits data. If there are multiple main modules on the bus, it is necessary to determine how to control the access of various main modules to the bus. Although the arbitration specification is part of the AMBA bus specificationAlgorithmIt is determined by RTL design engineers. Two of the most common algorithms are fixed-priority and cyclic algorithms. A maximum of 16 master modules and any number of slave modules can be deployed on the AHB Bus. If the number of master modules is greater than 16, you need to add a layer of structure (For details, refer to the multi-layer AHB specification launched by arm ). The APB bridge is the only main module on the APB bus and the slave module on the AHB system bus. Its main function is to lock the address, data, and control signals from the AHB system bus, and provide secondary decoding to generate the selection signal of APB peripheral devices, so as to realize the conversion from the AHB protocol to the APB protocol.

 

AHB Overview
AHB is mainly used for the connection between high-performance modules (such as CPU, DMA, and DSP). As an on-chip system bus of SOC, it includes the following features: single clock edge operation; non-three-state implementation mode; Support for burst transmission; Support for segmented transmission; support for multiple master controllers; Support for 32-bit ~ 128-bit bus width; supports transmission of byte, half-byte, and word. The AHB system consists of three parts: the main module, the slave module, and the infrastructure. The transmission of the entire AHB Bus is sent by the main module, and the slave module is responsible for response. The basic structure is from the arbiter, the main module to the multi-channel from the module to the main module, the multi-channel from the module to the main module, the decoder (decoder), the virtual slave module (dummy slave) and the virtual master (dummy master. The interconnection structure 1 is shown in.Eda China portal l9m % kw6d Ba, U9 @ n

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APB Overview
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APB is mainly used for the connection between peripheral peripherals with low bandwidth, such as uart and 1284. Its bus architecture is not like AHB's support for multiple main modules, the only main module in APB is the APB bridge. Its features include: two clock-cycle transmission; no waiting period and response signal; simple control logic, only four control signals. The transmission on APB can be illustrated by the state chart 2.Eda China portal C [-{Y ;??. O]

1) The system is initialized to the idle status. At this time, no transmission operation is performed and no slave module is selected.
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2) When there is a need for transmission, pselx = 1, penable = 0, the system enters the setup state, and will only stay in the setup State for one cycle. When the next rising edge of pclk arrives, the system enters the enable state. Eda China Portal: wns0h "l3o0' Z

B7q scxguest3) when the system enters the enable state, the paddr, psel, and pwrite in the setup State remain unchanged, and the penable is set to 1. Transmission will only maintain a period in the enable state, and will be completed after setup and enable state. If no data transmission is required, it enters the idle state and waits; if there is continuous data transmission, it enters the setup state. Link: http://www.openhard.org/myspace/blog/show.php? Id = 75802 http://blog.163.com/liting_2006/blog/static/3193794720085134491675/