Learning notes--uc/os-ii Three ways to deal with critical area code summary _ operating system

The hardware method or software method can be used to realize the correct access of critical section. The hardware method is a low-level method to solve the critical section problem, also called the Meta method. The Software method mainly refers to the signal volume mechanism. The first thing that comes to mind when a process is synchronized or mutually exclusive is the semaphore, N processes share a common semaphore mutex, the initial value is 1, each process before entering the critical section of the signal to carry out p operation, only in the case of obtaining the signal quantity to enter the critical section, otherwise blocking themselves, waiting for the release of the signal , the principle is simple and understandable.

There are two types of hardware methods: One kind is the shielding interrupt method, the interruption can cause the multiprogramming concurrent execution, especially for the deprivation kernel, if has the higher priority process in the interrupt processing process to enter the ready state, then will immediately carry on the process scheduling after the interruption, deprives the processor use right which is interrupted the process, To the newly arrived high-priority process. Interrupt handlers and the high priority process of acquiring the processor after the interruption has the potential to access the critical resources, resulting in inconsistent data, shielding the interruption to prevent these phenomena from happening. Interrupt Shielding method has its limitations, first of all, it only applies to the case of a single processor, and secondly, for the uc/os-ii of this real-time requirements of the kernel, the length of the interruption time on the quality of the system service is very large, in principle should make the interruption time to the minimum. The second kind of method is in the design hardware instruction system, specially set similar "Test_and_set" the instruction to carry on the lock and the lock operation to the critical resource, because the instruction is realizes completely by the hardware logic (instruction system's realization includes the hard wiring and the micro-program two kinds of methods, However, in any case, through the logic circuit to achieve the instructions, decoding, execution and other steps, it is impossible to interrupt the atomic operation, and thus achieve the protection of critical resources. Compared with interrupt shielding method, this method is feasible in multiprocessor case, but obviously increased the design complexity of the instruction system, and in today's widely used RISC (such as ARM), users do not have the opportunity to or do not have the ability to design the instruction system, so that the use of this method is greatly reduced.

It is noteworthy and need to strengthen the understanding of the semaphore mechanism used in the P, V (or wait, signal) operation is two primitives, and it is clear that the two primitives are not hardware instructions, so who is to ensure that the atomic, in a single processor system or the need to pass the blocking method to achieve, Therefore, in the final analysis, the implementation of critical areas of the correct access to the problem or in the hardware layer to solve. As for the multiprocessor situation, it needs to slowly understand, and multiprocessor instruction system how to achieve, and the single processor how much difference, there are many problems to understand, after all, is now a beginner, hehe.

Now we start with a summary of the three methods for Uc/os-ii to handle critical section code. The reason why I wrote so many big paragraphs before, mostly I don't understand why uc/os-ii in the implementation of the critical section of the problem is only to use the shielding interrupt and not to mention the semaphore method, and so on, but also in the learning process can be found, it is a very important concept of shielding interruption and put in the first place to understand, Very confused at first, but like the conclusion of the previous paragraph, the kernel is directly related to the underlying hardware, and the solution to the critical section of the fundamental means or shielding interruption, then Guanzhong is the core to solve this problem is the most efficient way.

Because the underlying hardware is involved, different CPU interrupts are not identical, so this part of the code should be written in the porting-related file OS_CPU. h, and use macros to facilitate definition and invocation. Take the 80x86 series processor as an example.

#define OS_CRITICAL_METHOD 2/* defaults to the second method * *

typedef unsigned short OS_CPU_SR; /* Define program status Word CPU status register (PSW = bits) * *

The first method:

#if       os_critical_method = 1
#define   os_enter_critical ()   asm  cli                                 /* Disable interrupts                          */
#define   os_exit_critical ()    asm  sti                                      /* enable  interrupts                          */
#endif

Simple open interrupt and off interrupt, call Macro os_enter_critical () before entering critical section, call Os_exit_critical () when exiting critical segment, the problem with this method is that if the interrupt is already closed before entering the critical section, the uc\ is called in the critical section os-ii function function, then do not wait until os_exit_critical (), return from the Uc\os-ii function, the interruption is restored by the function function of the system, and will not remain in the critical area before the interrupt shutdown state, so the effect is not as ideal as expected. The explanation given in the book is that "for certain processors or compilers, this is the only way to define this interruption."

The second method:

#if       Os_critical_method = 2
#define   os_enter_critical ()   ASM {PUSHF; cli}                  /* Disable interrupts                         */
#define   os_exit_critical ()    asm  Popf                                  /* enable  interrupts                          */
#endif

Before entering the critical section, the flag register is put into the stack, then the interrupt, enter the critical section, exit the critical section of the stack recovery flag Register, then can keep to the critical section before the break off or open the state. The problem with this approach is that some compilers may not optimize the inserted Line assembly code. This method may not be feasible, especially if the push and pop instructions change the value of the stack pointer, and if the processor supports the stack pointer relative addressing mode, it will cause all programs using the stack pointer to be wrong and the problem is serious.

The third method:

#if Os_critical_method = 3
#define Os_enter_critical () (Cpu_sr = OSCPUSAVESR ())/* Disable Interrupts * *
#define Os_exit_critical () (OSCPURESTORESR (CPU_SR))/* Enable Interrupts * *
#endif

The best way to solve the above contradictions specifically defines a variable OS_CPU_SR to hold the PSW, without the stack, avoiding changes to the stack pointer to cause system instability, but the obvious consequence is that the need to access memory, not the first two to achieve high efficiency, and in the real-time requirements of the system, Time complexity is likely to be unacceptable.

To sum up, in the actual development of different situations to choose different implementation methods to achieve an acceptable effect.

There is also a need to understand the problem, for the blocking interrupt should do how to deal with ...