The Information System Management Engineer is an intermediate examination in the National computer Technology and software Professional Technical Qualification Examination (hereinafter referred to as the Software Qualification examination). The examination of Information System Management engineer requires examinee to master the relevant knowledge content of computer system, operating system, database, computer network, informationization and information system. The Information System Management Engineer exam requires a wide range of content, and what are the key points to be mastered during preparation? Following the Greek Soft Test Institute to learn information Systems Management Engineer Computer hardware basic Verification code part of the key to grasp the content.
Information System Management Engineer Preparation Knowledge point explaining verification code
Parity Check
is a simple and effective method of calibration by adding a check digit to the encoding to make the number of 1 in the encoding odd (odd) or even (even), so that the code distance becomes 2
CRC
Using the generated polynomial to generate r parity bits for K data bits, the encoding length is: k+r
a direct correspondence between polynomial and binary
The highest power of x corresponds to the highest bit of the binary number, the following members correspond to the power of the polynomial, there is this power term corresponding to 1, without this power of the corresponding 0
It can be seen that the highest power of X is R, and the conversion to the corresponding binary number has the r+1-bit polynomial including the generation of the polynomial g (x) and the information polynomial C (x)
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Generating a polynomial
is the receiver and the sender of a convention, that is, a binary number, throughout the transfer process, the number remains unchanged
In the sender, using the generation polynomial to do modulo 2 operation of information polynomial, generate check code
The receiver uses the generated polynomial to perform modulo 2 operations on the received coded polynomial to detect and determine the wrong position
conditions should be met:
1. The highest and lowest bits of the generated polynomial must be 1
2, when the transmitted information (CRC code) any one error, is generated polynomial modulo 2 operation should make the remainder is not 0
3, different bit error, should make the remainder different
4, the remainder continue to do modulo 2 operation, should make the remainder cycle
Letter Tube Preparation Knowledge Point explaining • Verification code of computer hardware base