Linux Kernel memory management and usage

First, when the program requires a piece of memory that does not exist (that is, the page table items have marked that the corresponding page is not in the memory), the CPU is interrupted by a 80386 page error exception. When a process references a non-existent Memory Page, a page error interruption occurs, and the interrupted linear address is saved in the Cr2 register (for efficient and fast access ), therefore, the program that handles the interruption can know the exact address of the page exception, so that the page requested by the process can be loaded from the second-level storage space (such as the hard disk) to the memory. If the physical memory is occupied at this time, you can use a part of the second-level space as a buffer to swap pages temporarily unavailable in the memory to the second-level storage space, add the page required by the process to the memory. This is the memory page missing loading mechanism.

1. Addressing in real mode: addressing an address requires a segment and an offset value. The segment value is stored in the segment register (DS) and the length is fixed to 64 KB. The segment offset value is stored in addressable registers such as Si ). You can find the corresponding physical address based on the base address and intra-segment offset.

2. Addressing in protection mode: The Block register value is converted into the segment index value in the segment descriptor table, as well as the segment table representation bit and privileged level, and becomes the segment selection character. The concept of the offset value remains unchanged.

 

Each segment descriptor occupies 8 bytes, including the starting address (base address), segment length, and segment type (code segment or data segment) of the described segment in the linear address space). The maximum length of a segment is 4 GB.

The Descriptor Table that stores descriptor items has three types: gdt, IDT, and LDT. Gdt Global Descriptor Table is the main basic Descriptor Table, which can be referenced by all programs to access a memory segment. The IDT Interrupt Descriptor Table stores the segment descriptors that define the interrupt or exception handling process. The LDT Local Descriptor Table is used in multi-task systems. Generally, each task uses an LDT table, providing a range of addressable memory space for each task. To enable the CPU to locate gdt tables, IDT tables, and current LDT tables, three special registers (GDTR idtr ldtr) must be set for the CPU respectively.

It can be seen that LDT is also part of gdt, which contains the data segment and code segment of the task. The Interrupt Descriptor IDT is stored in the kernel code. The task Status section TSS is used to automatically save the CPU or reply to the current context of the task during task switching.

 

From the two figures above, we can see that the code data of task 0 is stored in the kernel code, and the virtual address space of each process can range to 64 MB.

Global and Interrupt Descriptor data structure:

Typedef struct desc_struct {

Unsigned long A, B;

} Desc_table [256];

In 32-bit machines, each descriptor occupies 8 bytes, so two long numbers are used to represent a descriptor.

The following describes the sched_init program.

Void sched_init (void)
{
Int I;
Struct desc_struct * P; // a descriptor structure is defined here.

If (sizeof (struct sigaction )! = 16)
Panic ("struct sigaction must be 16 bytes ");

// For the following two sentences, see Figure 1. first_tss_entry and first_ldt_entry are macros defined in sched. H. They are state segment descriptors and local descriptors of task zero, which are 4 and 5. Therefore, the following two statements use the status and LDT for setting task 0.
Set_tss_desc (gdt + first_tss_entry, & (init_task.task.tss ));
Set_ldt_desc (gdt + first_ldt_entry, & (init_task.task.ldt ));

// Point p to the status of task 1 and the base address of the LDT Descriptor Table item, and initialize the data structure of subsequent tasks from Task 1
P = gdt + 2 + first_tss_entry;
For (I = 1; I <nr_tasks; I ++ ){
Task [I] = NULL;
P-> A = p-> B = 0; // The status segment is cleared.
P ++;
P-> A = p-> B = 0; // clear the LDT segment
P ++;
}
/* Clear nt, so that we won't have troubles with that later on */
_ ASM _ ("pushfl; andl $0 xffffbfff, (% ESP); popfl ");
LTr (0 );
Lldt (0 );
Outb_p (0x36, 0x43);/* binary, Mode 3, LSB/MSB, CH 0 */
Outb_p (Latch & 0xff, 0x40);/* LSB */
Outb (Latch> 8, 0x40);/* MSB */
Set_intr_gate (0x20, & timer_interrupt );
Outb (inb_p (0x21 )&~ 0x01,0x21 );
Set_system_gate (0x80, & system_call );
}