I. S3C2410 supports four Power Supply Modes
1) NORMAL MODE
Maximum power consumption. you can disable the clock of a specific controller to reduce power consumption.
2) SLOW MODE
In this mode, there can be no internal PLL, and the power consumption depends on the frequency of the external clock.
3) IDLE MODE
FCLK is shut down, mainly because of CPU core power saving. Can be awakened by any external interruption
4) Power_OFF MODE
In addition to the processor wake-up logic unit, the processor does not consume any power. You can use EINT [] or RTC alarm interrupt to wake up the system.
II. Introduction to various power-saving modes of S3C2410
1) SLOW mode SLOW)
Set SLOW_BIT of CLKSLOW to 1
2) IDLE in IDLE mode)
CLKCON [2] is set to 1 and then enters
3) power-down mode Power_OFF)
CLKCON [3] is set to 1
Iii. Preparations before S3C2410 enters the power-down mode
1. Set Reasonable GPIO for power-down mode
2. Block all interrupts in the interrupt shield register.
3. Reasonably configure the wake-up source, including real-time clock
4. Suspend USB. Miscr [] = 11b
5. Store the sleep return address or data that is not lost in the power-down mode in GSTATUS3, 4
6. Configure miscr [1:0] to pull the data bus
7. Disable LCD
8. Read REFRESH, CLKCON, and miscr registers to populate TLB.
8th points may be a little difficult to understand. You need to explain it:
The reason is that you need to suspend the SDRAM before entering the power-down mode. After the SDRAM is suspended, you also need to operate the REFRESH, CLKCON, and miscr special function registers. The addresses of these registers may be virtual addresses, this requires corresponding entries in TLB. If not, you need to fetch the corresponding page table from the sdram. At this time, the sdram has been suspended. To prevent this problem, you can read the address to be accessed before suspending the sdram, in this way, the corresponding page table items will be retained in the TLB, and the access to REFRESH, CLKCON, and miscr will not require the support of sdram.
9. set REFRESH [22] = 1b to enable the self-REFRESH mode for the sdram.
10. Wait for the Self-refresh of sdram to be effective.
11. Set miscr [] = 111b to enable the signal (SCLK0, SCLK1 and SCKE) of the SDRAM to be protected in Power_OF mode.
12. Set CLKCON to enter the Power_OFF mode.
Iv. Wake-up process in power-down mode of S3C2410
1. Wake up the source system to generate an internal reset signal
2. After the system is reset, test whether GSTATUS2 [2] is indeed awakened from Power_OFF mode.
3. Set miscr [] = 000b to release the SDRAM signal protection
4. Configure the SDRAM Controller
5. Wait until the SDRAM is automatically refreshed and released
6. Read the values of GSTATUS3 and 4 and use them to return to the program location before sleep.
Note: To wake up the system using an external interrupt EINT [], you must keep the nBATT_FLT High.
V. Configure 2.6.26.5 kernel to support S3C2410 Power Management