Make Arch=arm CROSS_COMPILE=ARM-LINUX-GCC menuconfig analysis

When compiling the Linux kernel, the first thing to do is to modify the makefile file in the top-level directory of the kernel source, change the Arch = $ (subarch) to arch? = arm, and change the cross_compile? = to cross_compile? = arm- LINUX-GCC, or not modified, the arch and Cross_compile values are passed through the command line. Then in the Linux kernel source directory, execute make menuconfig, then what happened?

The make command looks for a file named makefile or Gnumakefile without specifying a file (file name is case-insensitive, no suffix). The Make Menuconfig command does not specify a file, so the default is to execute Make–f Makefile Menuconfig, which is the rule that executes the target Srctree in the $ (/makefile) menuconfig file. The top-level directory I used is named linux2.6.30.4, so $ (srctree)/makefile is linux2.6.30.4/makefile.

The following lists only the target rules in the Linux2.6.30.4/makefile file that are related to the execution of the command after make Menuconfig is executed (the file for the include in the makefile file is also included and expanded, below the Include keyword , all enclosed in {}, to represent the expanded content of the include file):

Linux2.6.30.4/makefile

... ...

# M=dir to specify directory of external module to build
# old syntax make ... Subdirs= $PWD is still supported
# Setting The environment variable kbuild_extmod take precedence
Ifdef subdirs
Kbuild_extmod = $ (subdirs)
endif
Ifdef M
Ifeq ("$ (Origin M)", "Command line")
Kbuild_extmod: = $ (M)
endif
endif

Ifeq ($ (KBUILD_SRC),)

Ifdef O
Ifeq ("$ (Origin O)", "Command line")
Kbuild_output: = $ (O)
endif
endif

... ...

Ifneq ($ (kbuild_output),)

... ...

Sub-make:force
$ (if $ (kbuild_verbose:1=), @) $ (make)-C $ (kbuild_output) \
kbuild_src=$ (CURDIR) \
Kbuild_extmod= "$ (kbuild_extmod)"-F $ (CURDIR)/makefile \
$ (filter-out _all sub-make,$ (makecmdgoals))

... ...

Skip-makefile: = 1

endif # IFNEQ ($ (kbuild_output),)
endif # ifeq ($ (KBUILD_SRC),)

Note: Because the make Menuconfig command does not define M, O, or skip-makefile, and there are three environment variables Subdirs, Kbuild_extmod, and KBUILD_SRC (unless you set it yourself, Otherwise, the Linux system will not have these three environment variables), so kbuild_output is empty, Skip-makefile is empty, Kbuild_extmod is empty, kbuild_src is empty.

Ifeq ($ (skip-makefile),)

... ...

Srctree: = $ (if $ (KBUILD_SRC), $ (KBUILD_SRC), $ (CURDIR))

Note:kbuild_src is empty, so the return value of the IF function is $ (CURDIR), CURDIR is the built-in variable of make, and its value is the directory where the Make command is executed, and for me This example is entered into the D:\linux2.6.30.4 after make Menuconfig, so CurDir is D:\linux2.6.30.4.

... ...

Srcarch: = $ (ARCH)

... ...

Include $ (srctree)/scripts/kbuild.include

{

... ...

Build: =-F $ (if $ (KBUILD_SRC), $ (srctree)/) Scripts/makefile.build obj

Note:kbuild_src is empty, so the value of $ (srctree)/is not returned, i.e. the last sentence is actually build: =-F Scripts/makefile.build obj,

... ...

}

... ...

Phony + = Scripts_basic
Scripts_basic:
$ (Q) $ (make) $ (build) =scripts/basic

... ...

Phony + = Outputmakefile
Outputmakefile:
Ifneq ($ (KBUILD_SRC),)
$ (Q) LN-FSN $ (srctree) source
$ (Q) $ (Config_shell) $ (srctree)/scripts/mkmakefile \
$ (srctree) $ (objtree) $ (VERSION) $ (patchlevel)
endif

... ...

Config-targets: = 0
Mixed-targets: = 0

... ...

Ifeq ($ (kbuild_extmod),)
Ifneq ($ (Filter config%config,$ (makecmdgoals)),)
Config-targets: = 1
Ifneq ($ (filter-out config%config,$ (makecmdgoals)),)
Mixed-targets: = 1
endif
endif
endif

The note:makecmdgoals variable refers to the target string passed from the Make command line argument, and the makecmdgoals of the Make Menuconfig command is menuconfig. Kbuild_extmod is empty, makecmdgoals string and%config mode conform, so config-targets: = 1, and makecmdgoals in addition to%config mode, there is no other pattern string, so $ ( Filter-out config%config,$ (makecmdgoals)) is empty, so mixed-targets is still 0

Ifeq ($ (mixed-targets), 1)

... ...

Else

Ifeq ($ (config-targets), 1)

... ...

%config:scripts_basic outputmakefile Force
$ (Q) mkdir-p include/linux include/config
$ (Q) $ (make) $ (build) =scripts/kconfig [email protected]

Else

... ...

endif #ifeq ($ (config-targets), 1)
endif #ifeq ($ (mixed-targets), 1)

... ...

endif # Skip-makefile

... ...

Phony + = Force
Force:

. Phony: $ (phony)

After Note:make Menuconfig, after some logical judgement (that is, the previous ifeq ($ (config-targets), 1), and finally to execute the%config goal of the rules,%config the goal of the rules there are two commands, the first one to create two directories , the second executes the make command, and the value of q is defined as @ or empty, and @ ... This means that the line rule is not displayed on the screen at execution time, so $ (Q) does not matter. Make is an inline variable whose value is Make,[email protected] represents the current goal, that is, the menuconfig, so the second rule is actually make-f Scripts/makefile.build obj=scripts/kconfig Menuconfig, go to the Scripts/makefile.build file, make Target is menuconfg. The MENUCONFG target has three dependent scripts_basic outputmakefile force. The command for the rule of the Scripts_basic target is $ (Q) $ (make) $ (build) =scripts/basic, which expands the make-f scripts/makefile.build obj=scripts/basic. Viewing the Makefile.build file, you can see that the default target for the file is that the __build,__build target has two rules, the first one is an empty rule, and the second rule has a command. In accordance with the makefile rule, when a target has multiple rules, only one rule has a command to generate the target, and the commands and dependencies in the multiple rules are merged when the makefile file is read, so the substantive rules for __build goals here are

__build: $ (if $ (kbuild_builtin), $ (builtin-target) $ (lib-target) $ (extra-y)) \
$ (if $ (kbuild_modules), $ (obj-m) $ (modorder-target)) \
$ (SUBDIR-YM) $ (always)
@:

Kbuild_builtin, kbuild_modules are defined in the top-level makefile file and are defined by the Export keyword so that when the makefile is recursive, the two variables are passed through the makefile. Kbuild_builtin and Kbuild_modules have not been changed since the definition in the top-level makefile file is assigned to 1. So the __build target's dependency here is $ (builtin-target) $ (lib-target) $ (extra-y) $ (subdir-ym) $ (always). The command ":" means nothing in bash but simply returns true. After analysis, found that builtin-target, Lib-target, extra-y, Subdir-ym are empty strings, only always have value, always in scripts/kconfig/ Makefile is defined as Dochecklxdialog, and the comment for the rule that dochecklxdialog the target is written with the # Check, we have the required ncurses stuff installed for Lxdi Alog (Menuconfig), that is, the __build Target's dependency dochecklxdialog is used to check the Build Configuration dialog box required by the Ncurses library is installed on the machine, if not installed, the make process will be an error exit. So before making menuconfig, we have to make sure that the library is installed locally.

The Outputmakefile goal rule actually does nothing. Force's rules are empty and nothing is done. Force is defined as a pseudo-target, so it is always considered up-to-date as a dependency (newer than the target), so force as a dependent target will inevitably regenerate every time the make is created, where the rule command for the force pseudo-target is empty, so force is in the Kbuild system, is equivalent to a keyword, and if we want a target to be regenerated every time a make is made, write force as a dependency on that target.

Linux2.6.30.4/scripts/makefile.build

SRC: = $ (obj)

Phony: = __build
__build:

... ...

Kbuild-dir: = $ (if $ (filter/%,$ (SRC)), $ (SRC), $ (srctree)/$ (SRC))
Kbuild-file: = $ (if $ (wildcard $ (kbuild-dir)/kbuild), $ (Kbuild-dir)/kbuild,$ (kbuild-dir)/makefile)
Include $ (kbuild-file)

{

... ...

Ifdef kbuild_kconfig
Kconfig: = $ (Kbuild_kconfig)
Else
Kconfig: = arch/$ (Srcarch)/kconfig
endif

... ...

Menuconfig: $ (obj)/mconf
$< $ (Kconfig)

... ...

Note: by Make-f scripts/makefile.build obj=scripts/kconfig menuconfig, the SRC value is scripts/kconfig, which corresponds to the/% string pattern, so $ (filter/% , $ (SRC)) is scripts/kconfig, so Kbuild-dir is assigned a value of $ (SRC), that is, Kbuild-dir is scripts/kconfig. Because the Scripts/kconfig directory does not have a kbuild file, the function $ (wildcard $ (kbuild-dir)/kbuild) lookup fails and returns NULL, thus Kbuild-file value is assigned as $ (kbuild-dir)/ Makefile, also known as Scripts/kconfig/makefile. Then include $ (kbuild-file), the target menuconfig is found. The command for the rule of the Menuconfig target is $< $ (Kconfig), expanded to $ (obj)/mconf $ (Kconfig), and the value of obj is Scripts/kconfig, because no kbuild_kconfig is defined, And Srcarch was previously assigned a value of $ (ARCH), that is, Srcarch is arm, so the value of Kconfig is arch/arm/kconfig. Therefore the order of the rules of the menuconfig target is scripts/kconfig/mconf arch/arm/kconfig. Mconf here is actually an executable file in the Scripts/kconfig directory where the Arch/arm/kconfig string is run as a command-line argument, and the executable is actually based on arch/arm/ The Kconfig file provides a menu configuration that generates a configuration interface. Note: Why is it that scripts/kconfig/mconf is an executable file? Keep looking down to the Scripts/kconfig/makefile content:

Lxdialog: = LXDIALOG/CHECKLIST.O LXDIALOG/UTIL.O LXDIALOG/INPUTBOX.O
Lxdialog + = LXDIALOG/TEXTBOX.O lxdialog/yesno.o lxdialog/menubox.o

... ...

MCONF-OBJS: = MCONF.O zconf.tab.o $ (lxdialog)

... ...

Ifeq ($ (makecmdgoals), menuconfig)
Hostprogs-y + = mconf
endif

... ...

# Check that we had the required ncurses stuff installed for Lxdialog (menuconfig)
Phony + = $ (obj)/dochecklxdialog
$ (Addprefix $ (obj)/,$ (Lxdialog)): $ (obj)/dochecklxdialog
$ (obj)/dochecklxdialog:
$ (Q) $ (Config_shell) $ (check-lxdialog)-check $ (HOSTCC) $ (host_extracflags) $ (host_loadlibes)

Always: = Dochecklxdialog

... ...

}
Note: If in the process of compiling the kernel, you need to compile some executable files for the kernel compilation phase, you need to use the features supported by native programs of the Kbuild framework. In the Kbuild framework, the HOSTPROGS-Y variable is specifically used to indicate some executables that need to be used during the kernel compilation phase, and by hostprogs-y + = mconf, it is indicated to the make program that mconf is an executable file that needs to be used during the compilation phase. In addition, the Kbuild framework uses the-OBJS suffix to indicate that the corresponding executable file needs to be delivered through multiple target files, mconf-objs: = MCONF.O zconf.tab.o $ (lxdialog) is indicated to make, mconf file is by MCONF.O zconf.tab.o lxdialog/checklist.o LXDIALOG/UTIL.O lxdialog/inputbox.o lxdialog/textbox.o lxdialog/ YESNO.O LXDIALOG/MENUBOX.O Link generated. Again, when generating rules is not explicitly stated, the Kbuild framework defaults. o files are generated by the same name. C or. s file compilation. We can find the name of the 8. o file in front of the Scripts\kconfig and Scripts\kconfig\lxdialog directories. c file.

Make Arch=arm CROSS_COMPILE=ARM-LINUX-GCC menuconfig analysis