makefile--Basic Rules (0)

"Copyright notice: Reprint please keep Source: Zhou Xuewei: http://www.cnblogs.com/zxouxuewei/"

Generally a slightly larger Linux project will have a number of source files, the final executable program is also compiled by the many source files linked. Compilation is the compilation of a . C or . cpp file into an intermediate code . o file, which is used to generate the executable file using these intermediate code files. For example, in the current project directory, there are the following source files:

    # ls      common.h  debug.c  debug.h  ipc.c  ipc.h  main.c  tags  timer.c  Timer.h  tools.c  tools.h       #  

The above source code can be compiled like this:

# gcc-o Target_bin main.c debug.c ipc.c timer.c tools.c  

If you later modify one of the files (such as TOOLS.C), then execute the previous line of code, but if there are thousands of source files such compilation is certainly not reasonable. At this point we can compile as follows:

Then execute the command on the command line:

    # make       gcc-c main.c      gcc-c debug.c      gcc-c ipc.c      gcc-c timer.c      gcc-c tools.c      gcc-o target_bin m AIN.O debug.o ipc.o timer.o tools.o      #      # ls      common.h  common.h~  debug.c debug.h DEBUG.O  ipc.c  ipc.h  ipc.o  main.c  main.o  Makefile  makefile~  tags  Target_bin  timer.c  timer.h  timer.o  tools.c  tools.h  tools.o      #

It is visible that the . o file and the target_bin executable file are generated under this directory. Now we just need to execute a make command to do all the work, without having to do all the actions manually as before, and the make command reads the Makefile file in the current directory and finishes the compile step. The output from the compilation process to the contents of the screen can be seen after the execution of the make command, which is actually the commands we executed manually. Now, what is Makefile?

The so-called Makefile My understanding is actually consists of a set of group compilation rules of the file, each rule format is roughly:

    Target ...: Prerequisites       ... >---command              ...  

where target is the target file, it can be an executable file, a*.o file, or a label. Prerequisites is the source or *.o file that is required to generate the target , and can be the target of another rule. Commond is the operating system command to be executed to produce the target, which must begin with TAB(>---The tab character) and cannot be replaced with a space.

To make a target, you need to rely on the prerequisites file, and then execute the commond to generate it to get the target. This is the same as when we manually executed each of the compiled commands, in fact, we define the good one dependency, we write the dependent file that produces each file, and finally the compile command is executed automatically.

For example, when we givemakefile example TARGET_BIN MAIN.O is target,MAIN.O DEBUG.O IPC.O TIMER.O TOOLS.O is target_bin PREREQUISITES,GCC -O TARGET_BIN MAIN.O DEBUG.O  IPC.O TIMER.O TOOLS.O is commond targetmain.otarget main.o file.

In this example, theMakefile works as follows:

1. First rule target is found, the goal of the first rule is called the default target, as long as the default target is updated, even if the task is completed, other work is done for this purpose. The target of the first rule in the Makefile target_bin, since we are compiling for the first time, thetarget_bin file has not yet been generated and obviously needs to be updated, but at this time the dependent file MAIN.O DEBUG.O IPC.O TIMER.O tools.o are not generated, so you need to update these files before you can update Target_bin.

2. So make will further look for rules that target these dependent files MAIN.O debug.o ipc.o timer.o tools.o. First find MAIN.O, the target is not generated, the target depends on the file for Main.c common.h, the file exists, so execute the rule command gcc-c main.c, generate main.o. The dependent files required by other target_bin are also manipulated.

3. Finally implement Gcc-o Target_bin main.o debug.o ipc.o timer.o tools.o, update target_bin.

Run make again without changing the source code :

    # Make make      : ' Target_bin ' are up to date.      #  

Get prompt target target_bin is already up to date.

If you modified the file main.c , then run make :

    # vim MAIN.C      # make      gcc-c main.c      gcc-o target_bin main.o debug.o ipc.o timer.o tools.o      #  

At this point , make will automatically select the affected target recompile:

First update the default target, first check whether Target_bin needs to be updated, which needs to check its dependent file main.o debug.o ipc.o timer.o tools.o Whether it needs to be updated.

Second found main.o need to be updated because main.omain.c MAIN.O late, so need to execute build target MAIN.O command: GCC -C MAIN.C update main.o

Finally found that the target Target_bin dependent file main.o has been updated, so execute the corresponding command gcc-o target_bin main.o debug.o ipc.o timer.o tools.o Update Target_bin.

As a summary, the following steps are performed for a rule:

1. Check its dependent files first, and if the dependent files need to be updated, execute the rule that targets the file. If the rule is not available but the file is found, the dependent file does not need to be updated. If there is no such rule and there is no such file, the error exits.

2. Then check the target of the file, if the target does not exist or the target exists but the dependent file modification time is later than he or a dependent file has been updated, then the command to execute the rule.

Thus,Makefile can automatically find updated files, automatically regenerate targets, using Makefile than their own manual compilation, not only high efficiency, but also reduce the likelihood of errors.

There are many goals in Makefile, we can compile one of the specified targets, just need to bring the target name behind the Make command. If you do not specify a compilation target , make compiles the default target, which is the first target, and the first target given in this article is target_bin. Makefile. If we only modified the tools.c file, we might just want to see if the source code of our changes has a syntax error and do not want to recompile the project, you can execute the following command:

# make TOOLS.O   gcc-c tools.c  #  

The compilation succeeds, and here is another question, if you continue to execute the same command:

    # Make TOOLS.O make      : ' TOOLS.O ' was up to date.      #  

We first manually delete the tools.o file and then execute it, how is it manual? We want automatic, to automatic!! Well, let's add a target to remove the temporary files that are generated during the compilation, which is clean.

We add the following at the end of the Makefile :

Clean     :      >---rm *.o target_bin  

When we make the command directly, we do not go to that target because it is not included by the target of the default target Target_bin or targets with Target_bin dependent files. We need to specify the target at make when we want to do this . As follows:

# Make Clean  rm *.o Target_bin  

when the clean target is executed, then make will regenerate all the target files, because the files are purged when make is executed.

clean target should exist with your Makefile , it can be convenient for you to compile two times, but also can keep the source file cleanly. This goal is generally at the end, not at the very beginning, otherwise it will be executed as the default target, which is probably not your intention.

Finally,Makefile just tells the make command how to compile and link the program, tells the making command to generate the files needed for the target file, and the specific compile link work is the command that corresponds to your target.

Give a full makefile today :

TARGET_BIN:MAIN.O debug.o ipc.o timer.o tools.o  >---gcc-o target_bin main.o debug.o ipc.o timer.o tools.o     ma IN.O:MAIN.C common.h                                                                                                                                                                     >---gcc-c main.c     debug.o:debug.c debug.h common.h  >---gcc-c     debug.c IPC.O:IPC.C ipc.h common.h  >---gcc-c ipc.c     timer.o:timer.c timer.h common.h  >---gcc-c timer.c     TOOLS.O:TOOLS.C tools.h common.h  >---gcc-c tools.c clean     :  >---rm *.o target_bin  

makefile--Basic Rules (0)