Http://www.linuxidc.com/Linux/2012-04/59093.htm
People often write and use makefile, makefile often use the shell, but some of them need to pay attention to the place is not necessarily
Will pay attention, here are listed a few come, do not know whether it is useful to everyone.
1. Note The makefile variables and shell variables, see the following example:
DIRS = src bin Lib
All
@for I in $ (DIRS); /
Do/
echo "" $ $i; /
Done
Do you see it? Dirs is the makefile variable, I is the shell variable, when used:
$ (DIRS), $ $i The difference is still pretty big.
2. Each line of the shell is run in a separate process, and if you assign a variable in the previous behavior, do not expect it to be valid on the next line, for example:
@CROSS_COMPILE =mipsel-linux-
@echo $ (cross_compile)
The printed result will not be mipsel-linux-, and if you want to get the results you want, it will be a shell bar:
@CROSS_COMPILE =mipsel-linux-; echo @echo $ (cross_compile)
Or:
@CROSS_COMPILE =mipsel-linux-; /
echo @echo $ (cross_compile)
3. The shell must be written in target, or you will write a white-hard, is to be ignored by make.
@echo "Building all ..."
All
@echo "Begin"
Only the begin is printed.
Makefile Call the shell note