Makefile related knowledge

1. Preparation of the Makefile:
1>. Name of the Makefile
1. Makefile
2. Makefile
2>. Rules in the Makefile
Three parts:
Target (APP): Dependent (main.c A.C B.C)
Command (gcc main.c a.c b.c-o app)
GCC main.c a.c b.c-o app

Execute the make command to compile the entire project according to the rules written in makefile
You can have one or more rules in the makefile file

First version:
APP:MAIN.C SUB.C mul.c ADD.C
GCC main.c sub.c mul.c add.c-o app
Cons: Modifying a program, re-make other files will also be recompiled

Improved:
A second version:
Makefile principle of working time:
1. If the dependency in the rule does not exist, look down to the rule below and use the found rule to generate a non-existent dependency.
2. Decide whether to update by time:
First time: ADD.C-ADD.O
Second time: Modify ADD.C If the target time is earlier than the dependent time, need to update

Direct make generates a goal in a rule (the ultimate goal)
To generate targets in other rules:
Make the name of the target in the other rule
The second version of the program:
APP:MAIN.O SUB.O MUL.O ADD.O
GCC main.o sub.o MUL.O add.o-o app
# Write rules to generate files that do not exist in dependencies
Main.o:main.c
Gcc-c MAIN.C
Sub.o:sub.c
Gcc-c SUB.C
Mul.o:mul.c
Gcc-c MUL.C
Add.o:add.c
Gcc-c ADD.C

Hello
echo "Hello makefile"
Cons: Code redundancy

Third version:
Variables: Automatic variables: Custom variables can only be used in commands in a rule
$<: The first of the dependencies
$^: All the Dependencies
[Email protected]: The goal in the rule
%.o:%.c
Main.o:main.c
Gcc-c MAIN.C
Gcc-c Main.c-o MAIN.O
Uppercase: The variable that comes with makefile:
CC = = CC = = gcc
Cppflags =-i./

Code:
# Custom Variables
obj = main.o sub.o mul.o add.o
app:$ (obj)
GCC $ (obj)-o app
# Write rules to generate files that do not exist in dependencies
# pattern Rule
%.o:%.c
Gcc-c $<-o [email protected]
Cons:. o still need to be specified manually, adaptive ability not

Version 4:
Using functions:--in Makefile, all functions have a return value.
1. Wildcard--Search for files of the specified type under the specified directory
2. Patsubst--matching substitution function
Code:
# using the functions in makefile
src = $ (wildcard./*.c)
obj = $ (Patsubst%.c,%.O, $ (src))
app:$ (obj)
GCC $ (obj)-o app
# Write rules to generate files that do not exist in dependencies
# pattern Rule
%.o:%.c
Gcc-c $<-o [email protected]
Cons: No ability to clear items

Version 5:
DECLARE pseudo-target: Do not make the file do not update the judgment
. Phony: Target Name

# using the functions in makefile

target = App
src = $ (wildcard./*.c)
obj = $ (Patsubst%.c,%.O, $ (src))
app:$ (obj)
GCC $ (obj)-o app
# Write rules to generate files that do not exist in dependencies
# pattern Rule
%.o:%.c
Gcc-c $<-o [email protected]

#伪目标

. Phony:clean

Clean

-mkdir/abc

-rm-f $ (obj) $ (target)

　　

Makefile related knowledge