Marco Education class 20-2 first week study notes 1

The first week of study is mainly theoretical knowledge, understanding after mastering for the back of the knowledge to lay a good foundation.

Computer Fundamentals
Computer
Hardware
Host Core equipment: CPU (operator ALU, Controller cu), Memory: ROM, RAM
Host Other Devices: storage (hard disk, floppy disk, CD-ROM, USB), input (keyboard, mouse, printer, scanner, monitor); Other: modem, light cat
Software
System software: Operating system, Program language Processing system, database, driver
Application software: General-purpose software (Office software such as office), specialized software (software for each working environment)

Computer History
Time schedule for computer development:
40-50 generation of the first generation of computer electron tube era ENIAC

50-60 generation of the second generation of computer transistor era

60-70 generation of the third generation of computer integrated circuits era

70-Now the fourth generation of computer LSI era

von Neumann computer system: arithmetic, controller, memory, input device, output device

Moore's Law: When the price is constant, the number of integrated circuits can be increased by one time every 18-24 months, and the performance will be improved by one more times.

Computer classification
According to the classification of information: digital-analog hybrid computer, analogue computer, numerical computer;

Classification By Application: Dedicated computer, general-purpose computers

By size: Jumbo, mainframe, mini-machine, mini-machine, workstation, server

Server classification: Tower type, rack type (currently more common, thickness is usually 1U 2U 3U 4U 5U 7U 1u=1.75 inches = 44.45 mm usually 5 cm), blade type

Hardware Introduction

CPU: Central processing Unit: operator + Controller
Representative Manufacturer: Intel (Xeon: Xeon; Itanium: Itanium), AMD (Althlon MP) IBM (Power)
Parameters

Frequency: The clock rate of the CPU
FSB: Operating frequency of the system bus (can Overclock)
Multiplier: CPU FSB and frequency difference (fixed)
frequency = FSB * Octave
Cache

First-level cache L1

Second-level cache L2
Level Three cache L3

The first-level cache is built into the CPU and runs at the same speed as the CPU, which can effectively improve the efficiency of CPU operation. The larger the first-level cache, the more efficient the CPU, but limited by the internal structure of the CPU, the level of cache capacity is very small. The so-called Level two cache, which is to reconcile the speed between the first level cache and the memory. CPU call caching is first level cache, not enough when the speed of the processor gradually increased, resulting in a first-level cache will not be able to supply the demand, so it is promoted to level two cache. Secondary cache It is relatively slower than the speed of a primary cache, but it is larger than the amount of space in a first-level cache. The main thing is to do a level of cache and memory between the temporary exchange of data places. The same is true for level three caches. is a cache designed to read data that is not hit by a level two cache, and only about 5% of the data in a CPU with a level three cache will need to be called from memory, greatly improving CPU efficiency.

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Server CPU
Non-X86 server: Expensive, closed system, good stability, for banks

X86 server: Inexpensive, good compatibility, poor stability, low security, for PC

Motherboard
BIOS chip
I/O control ICS
Panel control Switch Interface
Expansion slots
Power supply Plug-in

Memory
Definition: Direct addressing of the space, access speed, power loss lost data.
Memory bandwidth Calculation formula: bandwidth = Memory Clock frequency x memory bus bits x multiplier factor/8

Both the SDR and DDR are 64bit bus widths, but the DDR can transmit data on both the rising and falling edges of the clock signal, so the corresponding bandwidth calculated is X2. RDR has a narrower bus bandwidth, only 16bit, but the RDR is working with a symmetric transfer mode of operation, so the resulting bandwidth is X2.

DDR2 400MHz Bandwidth =400*2*64/8=6400mb/s=6.4gb/s
DDR2 667 333MHz Bandwidth =333*2*64/8=5400mb/s=5.4gb/s

Causes CPU and memory bottlenecks the current memory speed is much lower than the speed of the processor.

Memory development process
30pin Simm Memory 1988 ago

72pin SIMM Memory 1988-1990
EDO DRAM Memory 1991-1994

PC66 SDRAM 1995 years later
Ddr
DDR2
DDR3

Server memory Protection Technology
Re-select the Used memory technology: To prevent memory damage or failure, there is reserved storage, spare memory and the original size equal;
Memory mirroring: When a memory fails, provides data protection, data is written to two mirrored memory areas at the same time, and when one is broken, it can be read from another without affecting.

HDD
interface type: IEEE 1349 interface, IDE interface, SCSI interface, current most mainstream interface is SATA and SAS (SATA compatible)
Category:
sata: Capacity 250g 320g 500g 750g 1t 2t, rpm 5400 7200 cache 8m 16m 32m
sas: Capacity generally has 146g 300g 450g 600g 1t, 2t, rotate speed 10000 15000, cache 16m 32m 64m
SSD Read and write fast, stable performance, shockproof, heat dissipation

raid card
implement RAID setup and rebuild, detect and repair many errors, error disk detection, etc. A number of disks as required to form a whole, by the array control management, improve the performance and reliability of the disk subsystem

Nic
   
1gb/s Gigabit network adapter

Infiniband Fiber Optic Card

Store

Normal storage: Hard disk, floppy disk, CD
Disk array
Storage technology

DAS Direct storage equivalent to native storage, low cost, convenient and simple
NAS Network storage based on File protocol NFS smb/cifs similar to FTP server, centralized management, cross-platform, poor reliability, suitable for small networks.
SAN Storage Area network based on SCSI IP ATM protocol, etc., realize complex, high cost, good performance, good stability

Operating system
The role of the OS: Hardware drivers, process management, memory management, network management, security management, file management
Category:

Server Linux AIX windows
Desktop Windows Apple
Mobile Android iOS

Development interface
API Application Directory interface defines the interface of source code and library directly---the same source can be compiled in any system that supports this API
Abi uses the underlying interface between the binary interface application and the operating system---allows the compiled target code to run without modification in a system that uses a compatible ABI
A series of API standards defined by POSIX IEEE on the operating system

Run Program format

Windows:exe, Dll,lib
Linux:elf,so,.a

Programming languages
Low-level languages: Machine language (0 1), assembly and machine language one by one correspondence, closely related to hardware, for driving development
Intermediate Language: C language System-level applications, drivers
Advanced language jave C # python php more neighbor

Marco Education class 20-2 first week study notes 1