MSP430 microcontroller adconverter

MSP430 microcontroller adconverter

20:14:05 | classification: MSP430 microcontroller | report | font size subscription

I. Brief Introduction:

The adc12 module consists of the following parts: the input 16 analog switches (eight external channels, four internal channels), the ADC internal voltage reference source, the adc12 kernel, and the ADC clock source, collection and holding/trigger source, ADC data output, and ADC control registers.

 

Four sampling modes:

(1) single-channel single-time Conversion Mode

(2) sequence channel word Conversion Mode

(3) single-channel multi-Conversion Mode

(4) Multiple conversion modes of sequential Channels

 

I personally think that the (3) mode should be mostly used,

Convert the selected channel multiple times until the function is disabled or ENC = 0. Perform the following settings:
X = csstartadd, pointing to the conversion start address
Adc12memx stores the Conversion Result
The channels and reference voltages are defined in the adc12mctlx register.
In this mode, to change the conversion mode, you do not need to stop the conversion. After the current conversion is complete, you can change the conversion mode. You can stop this mode in the following ways:
The conseq = 0 method is used to change to the single-channel mode.
ENC = 0 is used to stop the current conversion.
Replace the current mode with the single-channel mode, and ENC = 0
ADC control register
Adc12ctl0 conversion control register 0
Adc12ctl1 conversion control register 1
Adc12ie interrupt enable register
Adc12ifg interrupt mark register
Adc12iv interrupt vector register
ADC12MEM0-15 storage control registers 0-15
ADC12MCTL0-15 storage control registers 0-15
General Practice: Start conversion in a large loop. If the conversion is completed, the interruption is triggered. We record and process the conversion data in the interruption.

 

 

 

 

II. Adc12 register description
-----------------------------------------------------------------------
Register Type register abbreviation register meaning
-----------------------------------------------------------------------
Conversion Control Register adc12ctl0 conversion control register 0
Adc12ctl1 conversion control register 1
-----------------------------------------------------------------------
Interrupt control register adc12ifg interrupt mark register
Adc12ie interrupt enable register
Adc12iv interrupt vector register
-----------------------------------------------------------------------
Storage and Its Control Register adc12mctl0 ~ Adc12mctl15 storage control register 0 ~ 15
Adc12mem0 ~ Adc12mem15 storage register 0 ~ 15
-----------------------------------------------------------------------
1. adc12ctl0 control register 0. Definitions:
Bit15 ~ 12 bit11 ~ 8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Sht1 sht0 MSC 2.5 V refon adc12 on adc12 tovie adc12 tvie ENC adc12 SC
Adc12sc -- sampling/conversion control bit. The meanings of adc12sc under different conditions are as follows:
-------- | ---------------------------------------------------------------------
ENC = 1, | SHP = 1: adc12sc is changed from 0 to 1 to start A/D conversion. After A/D conversion is complete, adc12sc is automatically reset.
ISSH = 0 | SHP = 0: adc12sc maintains high sampling. A conversion is started when adc12sc is reset.
-------- | ---------------------------------------------------------------------
ENC -- enable bit conversion.
0: adc12 is in the initial state and cannot start a/D Conversion;
1: The first conversion is started from the rising edge of sampcon.
Adc12tvie -- allowed bit for switch time overflow (conversion time overflow occurs when another sampling request occurs before the current conversion is complete)
0: no conversion time Overflow
1: switch time Overflow
Adc12ovie-overflow interrupt allowed bit (overflow occurs when there is data in adc12memx that has not been read and new conversion result data is written)
0: No Overflow
1: Overflow
ADC12ON--ADC12 kernel control bit
0: Disable the adc12 kernel.
1: Open the adc12 kernel.
Refon-reference voltage control bit
0: the internal reference voltage generator is disabled.
1: Open the internal reference voltage generator
2.5 V-voltage value selection bit for internal reference voltage
0: Select 1.5v internal reference voltage
1: select the 2.5v internal reference voltage
MSC -- multiple sampling and conversion bits (conseq <> 0 indicates that the current conversion mode is not a single-channel conversion)
----------- | Bytes ---------------------------------------------------------------------------------------------
Valid condition | MSC Value Meaning
SHP = 1 | 0 each conversion requires the rising edge of the Shi signal to trigger the sampling timer.
Conseq <> 0 | 1: only the first conversion is triggered by the rising edge of the Shi signal, and then the sampling conversion will be performed immediately after the previous Conversion
----------- | Bytes ---------------------------------------------------------------------------------------------
Sht1, sht0 -- sampling holding timer 1, sampling holding timer 0
Define the values stored in the Conversion Result register adc12mem8 ~ Adc12mem15 and adc12mem0 ~ The relationship between the conversion sampling sequence and the sampling clock adc12clk in adc12mem7. The sampling period is an integer multiple of the period 4 of the adc12clk, that is:
Shitx 0 1 2 3 4 5 6 7 8 9 10 11 12 ~ 15
N 1 2 4 8 16 24 32 48 64 96 128 192
2. adc12ctl1 conversion control register 1 (most 3 ~ 15 digits, which can be modified only when ENC = 0:
Bit15 ~ 12 bit11 ~ 10 bit9 bit8 biy7 ~ 5 bit4 ~ 3 bit2 ~ 1 bit0
Csstartadd shs shp issh adc12 Div adc12 SSEL conseq adc12 busy
Csstartadd -- convert the memory address bit. The number of binary numbers represented by the four bits is 0 ~ 15 corresponds to adc12mem0 ~ 15. You can define the first address of a single conversion address or sequence conversion.
Shs -- sampling trigger input source selection bit.
0: adc12sc
1: timer_a.out1
2: timer_ B .out0
3: timer_ B .out1
SHP -- select the control bit for the sampling signal (sampcon.
0: sampcon Source: Sampling trigger input signal
1: sampcon is derived from the sampling timer, which is triggered by the rising edge of the sampling input signal.
ISSH -- sampling Input Signal Direction Control bit
0: The sample input signal is in the same direction.
1: The sampling input signal is a reverse input.
ADC12DIV--ADC12 clock source frequency factor selection bit. The division factor is the three-digit binary number plus 1
ADC12SSEL--ADC12 kernel clock source selection
0: adc12 internal clock source-adc12osc
1: aclk
2: mclk
3: smclk
Conseq -- switch mode selection bit
0: single-channel Conversion Mode
1: single sequence channel Conversion Mode
2: single-channel multi-Conversion Mode
3: Multiple conversion modes of sequential Channels
ADC12BUSY--ADC12 busy sign (for single-channel single-time conversion mode only, this bit is invalid in other Conversion Mode)
0: indicates no activity.
1: indicates that adc12 is in the sampling period, conversion period, or sequence conversion period
3. adc12mem0 ~ Adc12mem15 conversion storage register
These registers are all 16-bit registers used to store a/D Conversion results. Use 12 lower bits, and 4 Higher bits to read 0
4. adc12mctlx conversion storage control register (all bits can be modified only when the ENC is low, and you will be reset during por)
Each conversion memory has a corresponding conversion memory control register. Therefore, when csstartadd is used to convert the memory address bit, adc12mctlx is also determined. The Register has the following meanings:
Bit7 bit6 ~ 4 bit3 ~ 0
EOS sref inch
EOS-sequence end control bit
0: The sequence has not ended.
1: The last conversion in the sequence
Sref-reference voltage source selection bit
0: vr + = avcc, VR-= AVSS
1: vr + = vref +, VR-= AVSS
2, 3: vr + = veref +, VR-= AVSS
4: vr + = avcc, VR-= vref-/veref-
5: vr + = vref +, VR-= vref-/veref-
6, 7: vr + = veref +, VR-= vref-/veref-
Inch -- select analog input channel
0 ~ 7: a0 ~ A7
8: veref +
9: vref-/veref-
10: In-chip temperature sensor output
11 ~ 15 :( AVCC-AVSS)/2
5. The adc12ifg interrupt flag register is 16 bits. The interrupt flag adc12ifg. x corresponds to the adc12memx conversion storage register. The meanings are as follows:
Bit15 bit14... bit1 bit0
Ifg15 ifg14... ifg1 ifg0
Adc12ifg. X: the conversion is complete and the conversion result is loaded into the conversion storage register.
Adc12ifg. x Reset: adc12memx is accessed.
6. The adc12ie interrupt enable register is 16 bits, corresponding to the adc12ifg register. The meanings are as follows:
Bit15 bit14... bit1 bit0
Ie.15 ie.14... ie.1 ie.0
Adc12ie. x = 1: allows the adc12ifg. X to interrupt the request service when it is set.
Adc12ie. x = 0: Disable the interrupt flag adc12ifg. X to interrupt the request service when it is set.
7. adc12iv interrupt vector register
Adc12 is a multi-source interrupt: there are 18 interrupt signs (adc12ifg. 0 ~ Adc12ifg. 15 and adc12tov, adc12ov), but there is only one interrupt vector. Therefore, you need to set the priority order of these 18 marks and arrange the response of the interrupt mark according to the priority order. A request with a higher priority can interrupt the low priority of the ongoing service.

 

3. Standard procedure reference:

# Include "Export x14x. H"
Void initadc12 ();
Unsigned char wait;
Int main (void)
{
// Stop watchdog timer to prevent time out Reset
Wdtctl = wdtpw + wdthold;
Initadc12 ();
Return 0;
}
Void initadc12 ()
{
// _ Dint ();
Adc12ctl0 & = ~ ENC; // you can set adc12ctl0 and 1 only when ENC is reset !!!
Adc12ctl0 = MSC + refon + ref2_5v + sht0_15 + sht1_15;
/* MSC: multiple sampling and conversion BITs, which are only valid for sequential sampling or Multiple conversions.
0: the sampling timer is triggered by the rising edge of the Shi signal.
1: for the first time, the sampling timer Shi signal is required, and the subsequent conversion starts immediately after the previous conversion. */
Adc12ctl1 | = SHP + conseq_0;
/* SHP: 1: sampling signal source self-sampling timer 0: sampling signal source self-sampling input signal
Conseq: 0: single channel single conversion 1: sequential channel word conversion 2: single channel multiple conversion 3: sequential channel multiple Conversion
Cstartadd_x (0 ~ 15): Start position of conversion */
Adc12mctl0 = EOS + sref_0 + inch_7;
/* EOS: sequence bit
Sref: Reference Voltage selection
Inch: select a simulated input channel */
Adc12ie | = 0x0001; // enable the simulated channel to interrupt the switch.
_ Eint ();
// Adc12ctl0 | = adc12on + ENC; // modify !!! // This is wrong.
Adc12ctl0 | = adc12on;
Adc12ctl0 | = ENC;

Wait = 0; // variables can be defined here to indicate whether the conversion is complete.
Adc12ctl0 | = ENC + adc12sc; // if you want to start the conversion at another time, you can place the sentence elsewhere.
While (wait = 0)
;
}
# Pragma vector = adc_vector
_ Interrupt void ADC ()
{Int result [7];
Wait = 1;
Result [0] = adc12mem0;
/* Unsigned char q0;
Int * pmem = adc12mem;
// The Position of the flag after the conversion ends
For (q0 = 0; q0 <16; q0 ++)
{
Admem [q0] = * pmem;
Pmem ++;
}*/
}

MSP430 microcontroller adconverter