No one dares to spoof your CPU

1. clock speed

The clock speed is also called the clock frequency. The unit is MHz, which indicates the computing speed of the CPU. CPU clock speed = frequency X frequency doubling coefficient. Many people think that the clock speed determines the CPU running speed. This is not only one-sided, but also a misunderstanding of the server. So far, there is no definite formula for realizing the numerical relationship between the clock speed and the actual computing speed. Even two major processor manufacturers, Intel and AMD, are still very controversial, we can see from the development trend of Intel products that Intel is very focused on strengthening its clock speed. Like other processor manufacturers, some once compared to daliyun.com, which is equivalent to 2 GB Intel processor.

Therefore, there is no direct relationship between the CPU clock speed and the actual computing power of the CPU, and the clock speed represents the speed at which the digital pulse signals in the CPU oscillate. In Intel's processor products, we can also see the example that the 1 GHz Itanium chip can behave almost as fast as the 2.66 GHz Xeon/Opteron chip, or 1.5 GHz Itanium 2 is about as fast as 4 GHz Xeon/Opteron. The computing speed of the CPU depends on the performance indicators of the CPU pipeline.

Of course, the clock speed is related to the actual computing speed. It can only be said that the clock speed is only one aspect of the CPU performance, not the overall performance of the CPU.

2. External frequency

The external frequency is the baseline frequency of the CPU, and the Unit is MHz. The external frequency of the CPU determines the running speed of the entire motherboard. To put it bluntly, in desktops, The overclock we call is the extra frequency of the Super CPU (of course, the frequency doubling of the CPU is usually locked). I believe this is a good understanding. However, for the server CPU, overclocking is absolutely not allowed. As mentioned above, the CPU determines the running speed of the motherboard. The two operations are synchronous. If the CPU of the server is too frequently and the external frequency is changed, asynchronous operation will be generated, (Many desktops support asynchronous operation on the motherboard) This will cause instability of the entire server system.

In most computer systems, the external frequency is also the speed of synchronous operation between the memory and the motherboard. In this way, it can be understood that the external frequency of the CPU is directly connected to the memory, synchronous running status between the two. The external frequency and the FSB frequency are easily confused. The following section describes the differences between the front-end bus and FSB.

3. Front-End bus (FSB) frequency

The front-end bus (FSB) frequency (that is, the bus frequency) directly affects the direct data exchange speed between the CPU and memory. There is a formula that can be calculated, that is, data bandwidth = (bus frequency × data bandwidth)/8. The maximum bandwidth of data transmission depends on the width and transmission frequency of all data transmitted simultaneously. For example, the current 64-bit Xeon Nocona is supported, and the frontend bus is 800 MHz. According to the formula, its maximum bandwidth for data transmission is 6.4 GB/second.

The difference between the external frequency and the FSB frequency: the speed of the front-end bus refers to the speed of data transmission, and the external frequency is the speed of synchronous operation between the CPU and the motherboard. That is to say, a 10 million MHz external frequency refers to a digital pulse signal that oscillates times per second; the 800 MHz Front-End bus refers to the amount of data transmitted per second that the CPU can accept is MHz × 64bit bytes 8Byte/bit = MB/s.

In fact, the emergence of the "HyperTransport" architecture has actually changed the frequency of the front-end bus (FSB. We know that IA-32 architecture must have three major components: Memory Controller Hub (MCH), I/O controller Hub and PCI Hub, like Intel's typical chipset Intel 7501, Intel7505 chipset, designed for dual Xeon processors, the MCH provided a 533MHz Front-End bus for the CPU. In combination with the DDR memory, the front-end bus bandwidth can reach 4.3 GB/second. However, as the processor performance continues to improve, it also brings many problems to the system architecture. The "HyperTransport" architecture not only solves the problem, but also improves the bus bandwidth more effectively. For example, the AMD Opteron processor, the flexible HyperTransport I/O bus architecture enables it to integrate the memory controller, enable the processor to directly exchange data with the memory without passing through the system bus to the chipset. In this case, the front-end bus (FSB) frequency is unknown in the AMD Opteron processor.

4. CPU bit and Word Length

Bit: binary is used in digital circuits and computer technologies. The code is only "0" and "1 ", either "0" or "1" is a "bit" in the CPU ".

Word Length: in computer technology, the number of digits of the binary number that the CPU can process at a time in a unit of time (at the same time) is called the word length. Therefore, an 8-bit CPU can process 8-bit data. Similarly, a 32-bit CPU can process 32-bit binary data per unit time. The difference between byte and Word Length: because common English characters can be expressed in 8-bit binary, 8-bit is usually called a byte. The length of the word length is not fixed, and the length of the word length varies with the CPU and the word length. The 8-bit CPU can only process one byte at a time, while the 32-bit CPU can process four bytes at a time. A 64-bit CPU can process eight bytes at a time.

5. multiplier Coefficient

The multiplier refers to the relative proportional relationship between the CPU clock speed and the external frequency. The higher the frequency, the higher the CPU frequency. But in fact, with the same external frequency, the CPU itself has little significance. This is because the data transmission speed between the CPU and the system is limited, when a CPU with a high frequency is pursued, a significant "bottleneck" effect will occur-the speed at which the CPU obtains data from the system cannot meet the CPU operation speed. Generally, Intel's CPU except for the engineering sample version locks the frequency doubling, but AMD never locks.

6. Cache

The cache size is also one of the important indicators of the CPU, and the cache structure and size have a great impact on the CPU speed. The cache operation frequency in the CPU is extremely high, which is generally the same as that in the CPU, the efficiency is much higher than the system memory and hard disk. In actual work, the CPU often needs to read the same data block repeatedly, and the increasing cache capacity can greatly improve the data read hit rate inside the CPU, instead of searching for data in the memory or hard disk, to improve system performance. However, because of the CPU chip area and cost, the cache is very small.

L1 Cache (first-level Cache) is the first high-speed Cache of the CPU, which is divided into data Cache and instruction Cache. The built-in L1 high-speed cache capacity and structure have a great impact on CPU performance. However, high-speed buffer memory is composed of static RAM and has a complex structure, when the area of the CPU core cannot be too large, the capacity of the L1-level high-speed cache cannot be too large. Generally, the L1 cache capacity of the server CPU is 32-256KB.

L2 Cache (second-level Cache) is the second-level high-speed Cache of the CPU, which is divided into two chips: internal and external. The internal chip second-level cache runs at the same speed as the clock speed, while the external second-level cache is only half of the clock speed. The L2 high-speed cache capacity also affects CPU performance. The principle is that the larger the cache capacity, the better. Currently, the maximum CPU capacity of a household is kb, the CPU L2 cache on servers and workstations is 256-1 MB, and some are 2 MB or 3 MB.

L3 Cache (three-level Cache) can be divided into two types: external Cache in the early stage and built-in Cache in the present. The actual function is that L3 cache applications can further reduce memory latency and improve the performance of the processor when computing large data volumes. Reducing memory latency and improving the computing capability of large data volumes is helpful for games. However, increasing the L3 cache in the server field still significantly improves the performance. For example, a configuration with a large L3 cache takes advantage of the physical memory, so the slow disk I/O subsystem can process more data requests. A processor with a large L3 cache provides more effective file system cache behavior and longer message and processor queue length.

In fact, the earliest L3 cache was applied on AMD's K6-III processor. At that time, the L3 cache was limited by the manufacturing process and was not integrated into the chip, but integrated into the motherboard. The difference between the L3 cache and the main memory that can only be synchronized with the system bus frequency is not much. Later, Intel used L3 to cache the Itanium processor launched by Intel for the server market. Then there are P4EE and Xeon MP. Intel plans to launch a 9 MB L3 cache Itanium2 processor and a dual-core Itanium2 processor that will later cache 24 MB L3.

However, basically the L3 cache is not very important for the performance improvement of the processor. For example, the Xeon MP processor with a 1 MB L3 cache is still not the opponent of Opteron. This shows that the increase in the frontend bus is obvious, this is more effective than the increase in cache performance.

7. CPU Extended Instruction Set

The CPU relies on commands to calculate and control the system. Each CPU is designed to specify a series of command systems that work with its hardware circuit. Command strength is also an important indicator of CPU, and instruction set is one of the most effective tools to improve the efficiency of the microprocessor. From the mainstream architecture at present, the instruction set can be divided into two parts: Complex Instruction Sets and simplified instruction sets. From the specific application perspective, such as Intel MMX (Multi Media Extended), SSE, SSE2 (Streaming-Single instruction multiple data-Extensions 2), SEE3 and AMD 3 DNow! And so on are CPU extended instruction sets, which enhance the processing capabilities of CPU multimedia, graphic images, and Internet. We usually call the Extended Instruction Set of CPU as the "CPU instruction set ". SSE3 instruction set is currently the smallest instruction set. MMX contains 57 commands, SSE contains 50 commands, SSE2 contains 144 commands, and SSE3 contains 13 commands. Currently, SSE3 is the most advanced instruction set. Intel Prescott processor already supports SSE3 instruction sets. AMD will support SSE3 instruction sets in the future, and all-round processors will also support this instruction set.

8. CPU core and I/O operating voltage

From 586CPU, the operating voltage of the CPU is divided into kernel voltage and I/O voltage. Generally, the core voltage of the CPU is less than or equal to the I/O voltage. The kernel voltage is determined by the CPU production process. Generally, the smaller the manufacturing process, the lower the Kernel Operating Voltage. Generally, the I/O voltage is between 1.6 and ~ 5 V. Low voltage can solve the problem of excessive power consumption and high fever.

9. Manufacturing Process

The micron of the manufacturing process refers to the distance between the circuit and the circuit in the IC. The trend of manufacturing processes is to develop towards a higher intensity. The higher the density of IC circuit design means that in the same size of the IC, you can have a higher density, more complex functions of the circuit design. Currently, the main types are 180nm, 130nm, and 90nm. Recently, it has been officially said that there are 65nm manufacturing processes.

10. Instruction Set

(1) CISC Instruction Set

The CISC Instruction Set, also known as a Complex Instruction Set. Its English name is CISC (abbreviation of Complex Instruction Set Computer ). In the CISC microprocessor, each instruction in the program is executed in sequence, and each operation in each instruction is also executed in sequence. The advantage of sequential execution is that the control is simple, but the utilization of each part of the computer is not high, and the execution speed is slow. In fact, it is Intel's x86 series (that is, the IA-32 architecture) CPU and compatible CPU, such as AMD,. Even the new X86-64 (AMD64) is part of CISC.

You need to know what the instruction set is from the CPU of today's X86 architecture. X86 instruction set is Intel for its first 16-bit CPU (i8086) dedicated development, IBM in 1981 launched the world's first PC CPU-i8088 (i8086 simplified version) is also X86 instructions, at the same time, the computer has added an X87 chip to improve the floating point data processing capability. Later, the X86 Instruction Set and the X87 instruction set will be collectively referred to as the X86 instruction set.

Although with the continuous development of CPU technology, Intel has successively developed the new i80386 and i80213to the past PII Xeon, PIII Xeon, Pentium 3, last to today's Pentium 4 series, Xeon (excluding Xeon Nocona), but to ensure that the computer can continue