OC8051 Software Programming Instructions

1. Reset

Reset by resetting the pin RST input, the reset must reach a high level of two cycles to reset the system. After the reset, the PC pointer is 0000H, so 0000H is the reset vector entry, reset from here to start running the program. After the reset p port (P0,P1,P2,P3) is set to FFH, the stack pointer value is 07H, the other special function registers the initial value is 00H, the internal RAM values are not affected by the reset, after reset, its value is uncertain.

2. Register List

Figure 1 is a list of registers for OC8051:

　

Figure 1 OC8051 Register list

Several special function register functions are described in turn below.

PSW (Program status word)

CY psw.7: Carry Flag

AC psw.6: Auxiliary carry Sign

F0 psw.5: User can be used as a universal flag

RS1 RS0 (psw.4 psw.3): Register Group selection

00: Register group 0 Address range 00-07h

01: Register Group 1 08-0FH

10: Register Group 2 10-17h

11: Register Group 3 18-1FH

OV psw.2: Overflow flag

-psw.1: User-defined Flag

P psw.0: Odd-even flag

　　

IE (interrupt enable)

　　

EA: Total interrupt Enable, ea=0; All interrupts are not responded to, ea=1, interrupts are controlled by separate enable bits for each interrupt.

ET1: Timer 1 interrupt Enable

EX1: External Interrupt 1 Enable

ET0: Timer 0 Interrupt Enable

EX0: External Interrupt 0 Enable

IP (Interrupt priority)

　　

As mentioned earlier, the OC8051 supports level two interrupt priority, set to 0: corresponding interrupts are low priority, set to 1: Corresponding interrupts are high priority.

PT1: Timer 1 Interrupt priority setting

PX1: External Interrupt 1 interrupt priority setting

PT0: Timer 0 Interrupt Priority setting

PX0: External Interrupt priority setting

　　

TCON (Timer/Counter control register)

　　

TF1: Timer 1 overflow flag, hardware position, software clear 0

TR1: Timer 1 operation control, 1: Start Timer/Counter

TF0: Timer 0 Overflow flag, hardware position, software clear 0

TR0: Timer 0 Operation control, 1: Start Timer/Counter

IE1: External interrupt 1 along flag, external interrupt edge detected, hardware 1, interrupt response, hardware clear 0

IT1: External Interrupt 1 Type control, 1: Drop Edge trigger, 0: low Level Trigger

IE0: External interrupt 0 along flag, external interrupt edge detected, hardware 1, interrupt response, hardware clear 0

IT0: External interrupt 0 Type control, 1: Drop Edge trigger, 0: low Level Trigger

Tmod (Timer/Counter Mode control register)

High 4bit Control timer 1, low 4bit control timer 0.

Gate:gate=0, the operation of the timer is controlled by the TRX bit (Tcon register), gate=1, controlled by the external pin intx, intx to 1 o'clock to run.

C/T: Timer/Count mode selection, counting mode, the TX input pin is counted.

M1 MO: Mode selection

00:13bit Timer mode

01:16bit Timer counting mode

10:8bit Automatic Reload Timer count mode

11: two independent 8bit timing counting mode, TL0 occupy Timer0 control line and medium disconnection, TH0 occupy Timer1 control line and interrupt line, (at this time the original Timer 1 cannot be used, because its control line and medium disconnection are occupied)

3, p port of the second function description

Shows the second functional description of the P3 port:

　　

The Intx and TX referred to in part 2nd are the int0,int1,t0,t1 pins. In addition, P0 and P2 ports are also used as access to external program memory, P0 represents a low 8-bit address, P2 represents a high 8-bit address, if the address line is less than 8, P2 can also be used as a data input port returned by the external program memory.

OC8051 Software Programming Instructions