OK6410 DDR initialization

When the bare board program is written on the OK6410, the DDR cannot be initialized successfully using Jink or using Loadbin ddr.bin 0xc000000 in Jlink-commander, and stays in the step of waiting for the DDR to initialize ready;

Note: The first two days can also successfully initialize the DDR and be able to perform the operation of the UART initialization, and then the NAND flash related initialization and write failed after the Loadbin will not successfully initialize the DDR;

Related parameters:

hclk=133m; armclk=533m;

DDR model: K4x1g163pc-samsung, 128M per piece, two pieces

The link address in makefile is 0xc000000

Ddr.h except for the setting of the parameter, the address is not good.

1 /*2 * Ddr.h3 *4 * Created on:2014-12-285 * Author:administrator6 */7 8 #ifndef Ddr_h_9 #defineDdr_h_Ten#include"Common.h" One #defineP1memccmd (* (volatile unsigned long*) 0x7e001004) A #defineP1refresh (* (volatile unsigned long*) 0x7e001010) - #defineP1caslat 0x7e001014 - #defineMem_sys_cfg 0x7e00f120 the #defineP1memcfg 0x7e00100c - #defineP1t_dqss 0x7e001018 - #defineP1T_MRD 0x7e00101c - #defineP1t_ras 0x7e001020 + #defineP1T_RC 0x7e001024 - #defineP1T_RCD 0x7e001028 + #defineP1T_RFC 0x7e00102c A #defineP1T_RP 0x7e001030 at #defineP1T_RRD 0x7e001034 - #defineP1T_WR 0x7e001038 - #defineP1T_WTR 0x7e00103c - #defineP1T_XP 0x7e001040 - #defineP1T_XSR 0x7e001044 - #defineP1T_ESR 0x7e001048 in #defineP1memcfg2 0x7e00104c - #defineP1_chip_0_cfg 0x7e001200 to #defineP1_user_cfg 0x7e001304 +  - #defineP1memstat 0x7e001000 the //#define P1MEMCCMD 0x7e001004 * #defineP1directcmd 0x7e001008 $ /*21:2 chips--burst:4 bytes--auto Power down:140ns--ap:10--raw:14--column:10*/Panax Notoginseng #defineP1memcfg_val 0x10012 - /*Read delay 1 cycle for Mobile ddr--mobile DDR sdram--memory width:32--*/ the #defineP1memcfg2_val 0xb41 + #defineP1_user_cfg_val 0x0 A  the #defineSet_val (Addr, Val) (* ((unsigned long*) addr) = (val)) + voidDdr_init (void); - #endif/* Ddr_h_ */

Ddr.c

#include"Ddr.h"#include"Common.h"voidDdr_init (void) {set_val (mem_sys_cfg,0xd);//xm0csn[2] as NfconP1memccmd =0x4;/*DRAM Controller Config State*/P1refresh= ((7.8*133) -1);/*Fresh timeval 7.8us*/Set_val (P1caslat,3<<1);/*CAS Latency:3*/Set_val (P1T_DQSS,0x1); Set_val (P1T_MRD,0x2);//Version2 Start//Set_val (P1t_ras, 0x8);Set_val (P1t_ras,0x7);//Version2 EndSet_val (P1T_RC,0xa); Set_val (P1T_RCD,0xc);//5:3=4-3 2:0=4Set_val (P1T_RFC,0x10b); Set_val (P1T_RP,0xc); Set_val (P1T_RRD,0x3); Set_val (P1T_WR,0x3); Set_val (P1T_WTR,0x2); Set_val (P1T_XP,0x2); Set_val (P1T_XSR,0x10); Set_val (P1T_ESR,0x10); Set_val (P1memcfg, P1memcfg_val); Set_val (P1memcfg2, P1memcfg2_val); Set_val (P1_chip_0_cfg,0X150FB); Set_val (P1_user_cfg, p1_user_cfg_val);/*Memory Init*/Set_val (P1directcmd,3<< -);/*NOP*/Set_val (P1directcmd,0);/*Prechargeall*/Set_val (P1directcmd,2<< -);/*AutoRefresh*/Set_val (P1directcmd,2<< -);/*AutoRefresh*/Set_val (P1directcmd,0xa0000);//EMRsSet_val (P1directcmd,0x80032);//MRSP1memccmd=0x0;/*DRAM Controller Go State*/ while(((* (* (unsignedLong*) P1memstat) &0x3)!=0x1);}

Loadbin Ddr.bin 0xc000000

Setpc 0xc000000

G

The next command prompt does not pop up

CTRL + C switch off Jlink-commander and restart Jlink-commander

Halt

See the value of the PC pointer

Go back to the disassembly code to find the PC value

Position in a loop that waits for the DDR to initialize a successful signal

The problem is: DDR is not initialized successfully, why? Continue checking the clock parameters and the settings of the DDR parameter

OK6410 DDR initialization