First install openocd. For detailed steps, refer to my previous article.
Then configure openocd. The following is my configuration, which is for reference only. I also hope that more people can grow together and share it with me:
Telnet_port 4444
Tcl_port 6666
Gdb_port 2331
# GDB Setup
# Gdb_port 3333
# Gdb_breakpoint_override hard
# Gdb_memory_map enable
# Gdb_flash_program enable
#-------------------------------------------------------------------------
# Interface Setup
#-------------------------------------------------------------------------
Interface jlink
#-------------------------------------------------------------------------
# Target Setup
#-------------------------------------------------------------------------
If {[info exists CHIPNAME]} {
Set _ CHIPNAME $ CHIPNAME
} Else {
Set _ CHIPNAME initi6410
}
If {[info exists ENDIAN]} {
Set _ ENDIAN $ ENDIAN
} Else {
# This defaults to a bigendian
Set _ ENDIAN little
}
# Trace buffer
If {[info exists ETBTAPID]} {
Set _ ETBTAPID $ ETBTAPID
} Else {
# Force an error till we get a good number
Set _ ETBTAPID 0x2b900f0f
}
If {[info exists CPUTAPID]} {
Set _ CPUTAPID $ CPUTAPID
} Else {
# Force an error till we get a good number
Set _ cputapid 0x07b76f0f
}
# JTAG scan chain
JTAG newtap $ _ chipname etb-irlen 4-expected-Id $ _ etbtapid
JTAG newtap $ _ chipname CPU-irlen 5-ircapture 0x1-irmask 0x1f-expected-Id $ _ cputapid
Set _ targetname $ _ chipname. CPU
Target create $ _ targetname arm11-Endian $ _ endian-chain-position $ _ targetname-variant arm1176
JTAG interface
Jtag_khz 1000
Jtag_nsst_delay 500
Jtag_ntrst_delay 500
# Reset Configuration
Arm11 memwrite burst disable
Reset_config trst_and_srst
Nand device 0 initi6400 $ _ targetname
# Trace setup... NOTE, "normal full" mode fudges the real ETMv3.1 mode
*
Etb config $ _ TARGETNAME $ _ CHIPNAME. etb
Set _ FLASHNAME $ _ CHIPNAME. flash
Flash bank $ _ FLASHNAME cfi 0x00000000 0x00100000 2 $ _ TARGETNAME
$ _ TARGETNAME configure-event reset-init {
Puts "Halting target"
Poll
Sleep 1
Halt
Wait_halt
Puts "Clock/Timer settings"
Reg cpsr 0x600001D3
Arm mcr 15 0 15 2 4 0x70000003
Mww 0x7e004000 0x00000000
Mww 0x7e00f120 0x00000003
Puts "Operating Mode Change to Sync Mode"
Mww 0x7e00f900 0x0000805E
Sleep 1000
Mww 0x7e00f900 0x000080DE
Sleep 1000
Mww 0x7e00f000 0x0000ffff
Mww 0x7e00f004 0x0000ffff
Mww 0x7e00f020 0x01047310
Mww 0x7e00f00c 0x81900302
Mww 0x7e00f010 0x81900303
Mww 0x7e00f01c 0x00000003
Puts "Dram initialization"
Mww 0x7e001004 0x00000004
Mww 0x7e001010 0x0000030c
Mww 0x7e001014 0x00000006
Mww 0x7e001018 0x00000001
Mww 0x7e00101c 0x00000002
Mww 0x7e001020 0x00000007
Mww 0x7e001024 0x0000000a
Mww 0x7e001028 0x0000000c
Mww 0x7e00102c 0x0000010b
Mww 0x7e001030 0x0000000c
Mww 0x7e001034 0x00000003
Mww 0x7e001038 0x00000003
Mww 0x7e00103c 0x00000002
Mww 0x7e001040 0x00000002
Mww 0x7e001044 0x00000011
Mww 0x7e001048 0x00000011
Puts "memory configuration register"
Mww 0x7e00100c 0x00010012
Puts "memory configuration register 2"
Mww 0x7e00104c 0x00000b41
Puts "chip 0 configuration"
Mww 0x7e001200 0x000150f8
Puts "memory direct command"
Mww 0x7e001008 0xc0000000
Mww 0x7e001008 0x00000000
Mww 0x7e001008 0x40000000
Mww 0x7e001008 0x40000000
Mww 0x7e001008 0x000a0000
Mww 0x7e001008 0x00080032
Mww 0x7e001004 0x00000000
}
Copy the configuration file to your working directory, that is, the directory where you want to load the file
After:
1. Open minicom,
2. Open the Development Board, start uboot, and quickly press any key on the minicom terminal.
3. Enter the directory with configuration files and run the openocd command to start openocd.
4. Open another Terminal 2 and run the telnet localhost 4444 command.
5. In Terminal 2, Use load_image led. bin 0X50008000
6. Run resume 0x50008000 in Terminal 2.
Note that steps 5th and 6 can be used to load the bin, elf, ihex, and s19 files. To use the debugging function, run the step command.