Ordinary electric Conversion scheme

(1) Transistor + pull-up resistance method
is a bipolar transistor or mosfet,c/d pole connected to a pull-up resistor to the positive supply, the input level is very flexible, the output level is roughly the positive supply level.

(2) Oc/od device + pull-up resistance method
Similar to 1). Suitable for applications where the output of the device is just oc/od.

(3) 74xHCT series chip boost (3.3V→5V)
All 5V CMOS devices that are input compatible with the 5V TTL level can be used as 3.3v→5v level transitions.
-This is due to the fact that the 3.3V CMOS level is exactly compatible with the 5V TTL level (coincidence), and the CMOS output level is always close to the power level.
Inexpensive options such as the 74xHCT (hct/ahct/vhct/ahct1g/vhct1g/...) series (The letter T is TTL compatible).

(4) Over-limit input step-down method (5v→3.3v, 3.3v→1.8v, ...)
Logic devices that allow the input level to exceed the power supply can be used as a lower level.
The "overrun" here refers to exceeding the power supply, many older devices do not allow the input voltage to exceed the power supply, but more and more new devices remove this limit (changing the input-level protection circuit).
For example, the 74AHC/VHC series chip, its datasheets clearly marked "input voltage range of 0~5.5v", if the use of 3.3V power supply, you can achieve 5v→3.3v level conversion.

(5) dedicated level conversion chip
The most famous is the 164245, which can be used not only as a boost/buck, but also to allow the power supply to be out of sync. It's the most versatile level-shifting solution, but it's also very expensive (I bought it before or ￥45/, though it's retail and expensive), so it's best to use the top two scenarios if not necessary.

(6) Resistance voltage divider method
The simplest way to lower the level. 5V level, by 1.6k+3.3k resistor voltage divider, is 3.3V.

(7) Current limiting resistance method
If there are too many of the two resistors above, it is sometimes possible to concatenate only one current-limiting resistor. Some chips, although in principle do not allow the input level beyond the power supply, but as long as a series of a current-limiting resistor, to ensure that the input protection current does not exceed the limit (such as the 74HC series 20mA), is still safe.

(8) Inaction without all the law
As long as the level of compatibility rules. On some occasions, there is no need for special conversions. For example, the circuit uses some kind of 5V logic device, its input is 3.3V level, as long as selecting the device when the input is TTL-compatible, there is no need for any conversion, which is equivalent to implicitly apply Method 3).

(9) Comparator method
Is dine, some people put forward to use this only, there is what op put law is too parody.

2. "Five elements" of level shifting

(1) Level compatible
To solve the level conversion problem, the most fundamental thing is to solve the logic device interface level compatibility problem. and the level compatibility principle is two:
VOH > VIH
VOL < VIL
It's just so easy! Of course, considering the anti-jamming capability, there must also be a certain noise tolerance:
| voh-vih| > vn+
| vol-vil| > vn-
Among them, vn+ and vn-indicate positive and negative noise tolerance.
As long as you master this principle, familiar with the input and output characteristics of various devices, it is natural to find a reasonable solution, such as the previous scheme (3) (4) is the correct use of the device input characteristics examples.

(2) Power order
Multiple power systems must be aware of the problem. Some devices do not allow the input level to exceed the power supply, and if there is no power supply, add input, it is likely to damage the chip. The best way to perform this kind of situation is to--164245 the solution (5). If speed permits, the scheme (1) (7) can also be considered.

(3) Speed/frequency
Some conversion modes affect the speed of work, so you must be careful. Like scheme (1) (2) (6) (7), due to the existence of resistors, the load capacitance through the resistor to charge, it will inevitably affect the speed of the signal jumping. In order to increase speed, the resistance must be reduced, which in turn will cause power consumption to rise. This scenario (3) (4) is relatively ideal.

(4) Output drive capability
If a certain current-drive capability is required, the scheme (1) (2) (6) (7) is problematic. This one is in fact consistent with the previous one, because the key to speed is the ability to charge the load capacitance.

Ordinary electric Conversion scheme