(Original) detailed introduction to Altera device Programming

I have summarized the programming of the Altera device as follows. I hope to comment on it more ..........

Configuration file:

After the logic code of the Altera us compilation is completed, the system generates the POF (Program object file) programming object file and the sof (SRAM object file) SRAM object file. POF is used to load EPC, and SOF is used to directly configure the SRAM structure of FPGA. The sof file can be converted to the JIC (JTAG indirect configure file) JTAG indirect configuration file, you can use JTAG to download both FPGA and EPC devices.

Hardware programmer:

Altera's Hardware programmers mainly include MasterBlaster, byteblastermv (byteblaster multivolt), byteblasterii, USB-blster, ethernetblaster, and Altera Programming Unit (APU). Among them, I personally use byteblster and USB-blster most often. Byteblastermv is used for the parallel port, and byteblasterii uses the parallel port and adds support for serial configuration devices. USB-blster and ethernetblster also provide support for serial configuration devices, which are downloaded using USB and Network Ports respectively.

Software programmer:

The software programmer is the built-in programmer of Altera Quartus. It mainly has four programming modes:

1. Passive serial mode (EPC device );

2. JTAG mode (devices of various companies );

3. active serial programming mode (EPC device );

4. In-socket programming mode (CPLD and APU );

Passive serial and JTAG modes are used for direct fpga sram programming. JTAG can also be used for EEPROM programming. The active serial programming mode is used to program the serial configuration device of the source object. The socket programming mode is used for the CPLD programming test in Apu.

You can also add devices in programmer. Open the programmer window and click "add device" to bring up the "select devices" dialog box, select the device to be added from the device family and device name lists.