(Original) How to Use Modelsim-Altera as the electrical model? (SOC) (Quartus II) (Modelsim)

Abstract
However, in Quartus II, the vector waveform method can be used as the electrical module, but this method is limited to a single module, how can we use Modelsim-Altera and testbench to create a linear electrical model?

Introduction
Environment: US us II 7.2 SP3 + Modelsim-Altera 6.1g

How can I design a digital circuit in the website? (SOC), we use the vector waveform modulo created in Quartus II. You can use the GUI interface to specify the waveform, which is very convenient, this drag-and-pull method is not a good choice for small e-phones, but big E-phones still have to rely on OpenGL to compile testbench, and then use Modelsim to create a model. In this article, how does one design a digital path? (SOC) (OpenGL)Posedge detection circuit)And use testbench with Modelsim-Altera to create a modulo.

Step 1:
Posedge_detection_tb.v/OpenGL

1 /*  
2 (C) oomusou 2008 Http://oomusou.cnblogs.com
3
4 Filename: posedge_detection_tb.v
5 Compiler: Modelsim-Altera 6.1g
6 Description: test10000of posedge_detection.v
7 Release: 07/09/2008 1.0
8 */
9
10 'Timescale 1ns / 10 ps
11 Module posedge_detection_tb;
12
13 Reg CLK;
14 Reg rst_n;
15 Reg I _data_in;
16 Wire o_rising_edge;
17
18 Posedge_detection U0 (
19 . CLK (CLK ),
20 . Rst_n (rst_n ),
21 . I _data_in (I _data_in ),
22 . O_rising_edge (o_rising_edge)
23 );
24
25 Parameter clkper =   100 ;
26 Initial begin
27 CLK =   1 ' B0;
28 End
29
30 Always begin
31 # (Clkper /   2 ) CLK =   ~ CLK;
32 End
33
34 Initial begin
35 Rst_n =   1 ' B1;
36 I _data_in =   1 ' B0;
37
38 # 75 ;
39 I _data_in =   1 ' B1;
40
41 # 100 ;
42 I _data_in =   1 ' B0;
43
44 # 125 ;
45 I _data_in =   1 ' B1;
46
47 # 75 ;
48 I _data_in =   1 ' B0;
49
50 # 175 ;
51 I _data_in =   1 ' B1;
52
53 # 25 ;
54 I _data_in =   1 ' B0;
55 End
56
57 Endmodule

Use testbench to describe the following waveform in vector Waveform

Step 2:
Set Quartus II to use Modelsim-Altera modulo

Assignments-> Settings-> category: EDA tool settings-> simulation:
Tool Name: Modelsim-Altera
Select Run gate-level simulation automatically after compilation
Format for output netlist: OpenGL
Time Scale: 1 us

Step 3:
Set testbench

In the nativelink settings of the same region, select compile test records, and press testbenches .. to add posedge_detection_tb.v. Test partition name, top level module in test partition, and design instance name in test partition cannot be caught by yourself.

Step 4:
Compute and compute

Processing-> Start Compilation

 

See also
(Reporter) How can I design a digital road? (SOC) (OpenGL)
How can I solve the problem that Quartus II cannot use Modelsim-Altera modulo? (SOC) (Quartus II) (Modelsim)
How to Implement functional simulation? (SOC) (Quartus II) (Modelsim)
(Reporter) How to Use Modelsim for pre-simulation and post-simulation? (SOC) (Modelsim)