Program machine-level representation (1)

I recently studied deep understanding of computer systems. I forgot about the computer system I learned. I found that this is a good teaching material. If I use this book to teach in colleges and universities, the effect would be good. This book always gives you exercise questions when appropriate, so that you can reflect on what you are learning. Here we will summarize the key points of Chapter 3 recently learned.

Why do we have to spend time learning machine code? Even if the compiler undertakes most of the work to generate assembly code, it is still an important skill for rigorous programmers to be able to read and understand assembly code.

Programmers who try to maximize the performance of a piece of key code usually try various forms of source code, each time they compile and check the generated assembly code to understand how efficient the program will run. The abstraction layer provided by the advanced language hides the information we need to know about the behavior of the program. The relationship between the source code and the corresponding assembly code is usually not easy to understand.

To learn this chapter, we should try to figure out whether a switch statement is always more efficient than a series of IF-else statements? What is the overhead of a function call? Is a while loop more effective than a for loop? Is pointer reference more effective than array index? Why is the running speed faster than placing the result of cyclic summation in a local variable in a parameter passed by reference? Why can we simply rearrange the brackets in a arithmetic expression to make a function run faster? How to Avoid buffer overflow errors? Realizing the existence of high-speed cache can improve program performance. How can this problem be improved? This is a problem that needs to be explored in the learning process.

To learn the assembly language, first we need to figure out what is the ia32 architecture?

Intel 32-bit architecture(English: Intel architecture, 32-bit, abbreviated as IA-32), often known as i386, x86-32 or x86, launched by IntelInstruction Set ArchitectureSo far, Intel's most popular processor still uses this architecture. It is a 32-bit extension of the X86 architecture and is first applied to intel
80386 chips, used to replace the previous x86 16-bit architecture (x86-16), including 8086, 80186 and 80286 chips. IA-32 is a complex instruction set. Complex Instruction Sets, also known as CISC instruction sets. The English name is CISC.
Instruction Set Computer ). In the CISC microprocessor, each instruction in the program is executed in sequence, and each operation in each instruction is also executed in sequence. The advantage of sequential execution is that the control is simple, but the utilization of each part of the computer is not high, and the execution speed is slow. In fact, it is Intel's X86 series (that is, the IA-32 architecture) CPU and compatible CPU, such as AMD,. Even the new X86-64 (also known as amd64) is part of CISC. You need to know what the instruction set is from the CPU of today's X86 architecture. X86 instruction set is intel for its first 16-bit CPU (i8086) dedicated development, IBM in 1981 launched the world's first PC CPU-i8088 (i8086 simplified version) is also x86 instructions, at the same time, the computer has added an x87 chip to improve the floating point data processing capability. Later, the x86 Instruction Set and the x87 instruction set will be collectively referred to as the x86 instruction set. Although with the continuous development of CPU technology, Intel has successively developed the new i80386 and i80213to the past PII Xeon, piII Xeon, Pentium
3. the Pentium 4 series and Xeon (not including Xeon Nocona), but to ensure that the computer can continue to run various applications developed in the past to protect and inherit rich software resources, therefore, all the CPUs produced by Intel continue to use the x86 instruction set, so their CPUs still belong to the x86 series. Because intel
The x86 series and Their compatible CPUs (such as amd athlon MP and) all use the x86 instruction sets, so they form today's huge x86 series and compatible CPU lineup. At present, x86cpu mainly includes Intel Server CPU and AMD server CPU.

Here we know that the ia32 architect has a command set. All the commands in this chapter come from this set.

Let's review what is the compilation process of a program: it consists of four steps: Pre-compilation, compilation, assembly, and link. Preprocessing (also known as preprocessing). During the preprocessing process, analyze the file inclusion (include) and pre-compiled statements (such as macro definition define) in the source code file. Compile (Compilation), and then call cc4. this stage generates an assembly code file suffixed with. s based on the input file. Assembly to convert the assembly code to the end of the binary target file. O. The target code is a form of machine code. It contains the binary representation of all commands, but it has not been filled with the global value of the address. Link (linking). When all target files are generated, GCC calls LD to complete the final key work. This phase is the connection. During the connection phase, all target files are arranged in the proper location of the executable program. At the same time, the library functions called by this program are also connected to appropriate places from their respective archives.

Data format

A 16-bit machine architecture. Intel uses the term "word" to represent a 16-bit data type. The 32-bit machine architecture is expanded from 16 bits, So 32 bits are called "double
The 64-digit quad words )". Most commands are for byte and double-word operations.

C declare the size (in bytes) of the gas extension of Intel Data Type)

Char byte B 1

Short (Word) W 2

Int double words l 4

Unsigned double words l 4

Long int double words l 4

Unsigned long double words l 4

Char * double words l 4

Float (signal) S 4

Double double (double) L 8

Long double expansion accuracy t 10/12

Each operation instruction in gas has a character suffix to indicate the size of the operand. For example, mov has three forms: movb, movw, and movl ). Here, the float suffix is also L, which will not be confused with integers, because floating point uses a set of completely different commands and registers (floating point registers ).

The Central Processing Unit (CPU) of ia32 contains 8 32-bit integer registers (for example ). We can see that there is a % E before each 32-bit register name. Here we can understand e as extended because the early 8086 register was 16-bit, therefore, after adding E, it becomes 32-bit.

The operand indicator includes the immediate number, register, and memory. It is the format of the corresponding operand and the corresponding addressing method.

Type	Format	Operation Value	Name
Instant count	$ IMM	IMM	Immediate addressing
Register	EA	R [EA]	Register addressing
Memory	IMM	M [Imm]	Absolute addressing
Memory	(Ea)	M [R [EA]	Indirect addressing
Memory	Imm (EB)	M [Imm + R [Eb]	(Base address + offset) Addressing
Memory	(EB, EI)	M [R [Eb] + R [ei]	Address Change Addressing
Memory	Imm (EB, EI)	M [Imm + R [Eb] + R [ei]	Address Change Addressing
Memory	(, EI, S)	M [R [ei] * s]	Proportional address change addressing
Memory	Imm (, EI, S)	M [Imm + R [ei] * s]	Proportional address change addressing
Memory	(EB, EI, S)	M [R [Eb] + R [ei] * s]	Proportional address change addressing
Register	Imm (EB, EI, S)	M [Imm + R [Eb] + R [ei] * s]	Proportional address change addressing

Data transmission command:

Move command: copy the value of the source operator to the destination operand. The value specified by the source operand is an immediate number, which is stored in registers or memory. The destination operand specifies a location, either a register or a memory address .. Each operand of the chain for sending commands cannot point to the memory location. The Register operations of these commands, for movl, can be 8 32-bit registers (% eax ~ % EBP). For movw, it can be 8 16-bit registers (% ax ~ % Bp), movb enables single-byte register elements (% Ah ~ % BH, % Al ~ % BL ).

The above is a recent summary.