1, new projects, fill in the project storage path and project name, do not appear in Chinese path
2, Add the existing file (optional), under "File name" to select an existing project, with "add" or "Add all" command added files to the new project, click "Next"
3, choose the chip type, here I choose Altera Company's Cycloneⅱ series, 208 pin, and under "Devices" select specific chip model, click "Next"
4, set the emulator and description language, "Simulation" under the selection simulation tool Modelsim, the description language is Verilog HDL, click "Next"
5, Display the setup information , display the project path, project name, top level file, Chip series models and other settings information, after the prosecution meet the need to click "Finish".
6, create a new Verilog HDL file, here wrote a simple with the door program, named best with the project name consistent
7, analysis of a comprehensive, determined to continue after the correct
quartusII13.0 Using Tutorials