Static inline void writeb (unsigned Val, unsigned ADDR)
{
// First, forcibly convert the type to the unsigned char * type pointer, then obtain the value of this address, and finally assign a value.
(* (Volatile unsigned char *) (ADDR) = (VAL );
}
Static inline unsigned readl (unsigned ADDR)
{
// First, forcibly convert the type to the unsigned char * type pointer, then obtain the value of this address, and finally assign a value. Similarly.
Return (* (volatile unsigned *) (ADDR ));
}
# Define hour (0xaa2f0000) # define hour (0xaa2f0004) # define hour (0xaa2f0008) # define hour (milliseconds) # define hour (0xaa2f0010) # define hour (0xaa2f0014) # define sequence (0xaa2f0018) # define sequence (0xaa2f0028) # define sequence (0xaa2f0030) # define sequence (0xaa2f0038) # define mdp_dsi_video_test_ctl (0xaa2f0034)
Void Merge (unsigned short display_wd, unsigned short display_ht, unsigned short image_wd, unsigned short image_ht, empty short kernel, unsigned short kernel, unsigned short kernel, empty short kernel, empty short kernel, unsigned short vsync_width, unsigned char lane_en) {unsigned char dst_format = 3;/* rgb888 */unsigned char traffic_mode = 2;/* non burst mode with sync start events */unsigned long low_pwr_stop_mode = 1; unsigned char eof_bllp_pwr = 0x9; /* needed or else will have blank line at top of display */unsigned char interleav = 0; dprintf (spew, "dsi_video_mode-DST format: rgb888 \ n "); dprintf (spew, "traffic mode: burst mode \ n"); dprintf (spew, "Data lane: % d Lane \ n", lane_en ); // The writel function is used to assign values to registers. Writel (0x00000000, mdp_dsi_video_en); the value of the mdp_dsi_video_en macro above is written to writel (0x00000000, dsi_clk_ctrl) in the register of the address 0x00000000; writel (0x00000000, dsi_clk_ctrl); writel (0x00000000, dsi_clk_ctrl); writel (0x00000000, dsi_clk_ctrl); writel (0x00000002, dsi_clk_ctrl); writel (0x00000006, dsi_clk_ctrl ); writel (0x0000000e, dsi_clk_ctrl); writel (0x0000001e, dsi_clk_ctrl); writel (0x0000003e, dsi_clk_ctrl); writel (0, dsi_ctrl); writel (0, inclusive ); writel (0x02020202, dsi_int_ctrl); writel (hsync_porch_bp + display_wd) <16) | bytes, bytes); writel (vsync_porch_bp + display_ht) <16) | metrics, metrics); writel (display_ht + vsync_porch_fp + vsync_porch_bp) <16) | (display_wd + metrics + hsync_porch_bp), metrics); writel (hsync_width) <16 | 0, dsi_video_mode_hsync); writel (0 <16 | 0, percentage); writel (vsync_width <16 | 0, percentage); writel (1, dsi_eot_packet_ctrl ); writel (0x00000100, dsi_misr_video_ctrl ); writel (1 <28 | 1 <24 | 1 <20 | low_pwr_stop_mode <16 | eof_bllp_pwr <12 | traffic_mode <8 | dst_format <4 | 0x0, writel (0x67, dsi_cal_strength_ctrl); writel (0x80006711, dsi_cal_ctrl); writel (0x00010100, dsi_misr_video_ctrl); writel (0x00010100, dsi_int_ctrl ); writel (0x02010202, dsi_int_ctrl); writel (0x02030303, dsi_int_ctrl); writel (interleav <30 | 0 <24 | 0 <20 | lane_en <4