Register of the Assembly

8086 Register Group Data Registers

These registers can be accessed in Word (16-bit) or byte (8-bit) units
Each register in a data register can be divided into 2 8-bit registers. Ah, AL,BH, bl,ch, CL,DH, DL, respectively. H represents a high-byte (high 8-bit) register, and L represents a low-byte (low 8-bit) register. For example, use AX register to hold a word 1234H, expressed as (ax) =1234h, high byte 12 placed in Ah, low byte 34 in AL
1. AX Accumulator
2. BX Base
3. CX Count
4. DX data Segment Register CS code segment DS data Segment ES extra segment SS stack segment address register

These registers can only be accessed in Word (16-bit) units
The address register includes a pointer and a variable-address register SP, BP, SI, di four 16-bit registers. As the name implies, they can be used to store the offset address of the memory operand. In addition, they can also be used as general-purpose registers
1. SI Source Index
2. DI Destination Index
3. SP stack pointer
4. BP base pointer control register

IP instruction Pointer instruction pointer

The IP instruction Pointer register, which holds the offset address in the code snippet, indicating the offset address of the unit where the next instruction is currently executing the instruction

SP stack pointer stack pointer flags (also known as PSW program status word) flag bit register, two 16-bit registers. Execution of the Flags flag Register for the control program is described separately

A bit in the flags flag register represents the 1 flags of the CPU, indicating a certain state of execution of the CPU. The lowest bit is D0 and the highest bit is D15. The 8086CPU flag Register has 9 flags, 6 condition code flags and 3 control flags, respectively. As shown in figure:

Condition Code Flag CF carry flag. When the highest bit of the instruction execution result is forward with rounding, cf=1, otherwise cf=0. SF symbol FLAG. When the highest bit (sign bit) of the instruction execution result is negative, sf=1, otherwise sf=0. ZF 0 logo. When the command execution result is 0 o'clock, zf=1, the result is not 0 o'clock, zf=0. of overflow flag. Of=1, otherwise of=0, when the instruction execution result has overflow (exceeding the representation range of the number). AF auxiliary carry flag. When the 3rd bit (half byte) of the instruction execution result is forward with a carry, af=1, otherwise af=0. PF parity flag. When the number of 1 in the instruction execution result is an even number, pf=1, otherwise pf=0. Control Flag DF Direction flag. When the string processing instruction is executed, if df=0 is set, the value of the address register of the memory cell is automatically increased, and if the df=1 is set, the value of the memory cell's address register is automatically reduced. If interrupt flag. Set the if=1 to allow the CPU response to mask interrupts, and if=0 to not respond. TF trap flags. In debug debugging, Tf=1, the use of single-step execution, that is, into the trap, tf=0, normal execution program. Example: Two binary number addition operation, the relevant flag bit automatically changed.

According to the calculation results, the CPU will automatically set the flag bit to: cf=0,sf=1,zf=0,of=0,pf=0, that is, no carry, the result is negative, the result is not 0, no overflow, odd number of 1 debug under the flag bit representation

Flag Name	logo	value of 1	value of 0
Rounding Flag	Cf	CY	NC
Symbol sign	SF	NG	Pl
0 symbols	Zf	ZR	NZ
Overflow flag	Of	OV	NV
Auxiliary carry Flag	Af	AC	NA
Parity flag	Pf	PE	PO
Direction flag	Df	Dn	Up
Interrupt Flag	IF	Ei	DI

the complement of the numbers indicates

In the computer, there are two concepts of true value and number of machines for the number of symbols available. Truth is the actual value with a "+", "-" number, the so-called machine number, is the "+", "-" symbolic value (0, 1) The actual number of the computer can be represented.
The number of machines has three kinds of code, namely the original code, anti-code and complement. In assembly language, the numbers are expressed in the form of a complement, so it is necessary to master the number of complementary and complementary expressions. These three codes are defined as follows:
1. Original code. The original code takes the highest bit as the sign bit, the positive number is 0, the negative is 1, the remaining 7 bits are the numeric digits.
2. Anti-code. The inverse of a positive number is the same as the original code for a positive number. When the inverse code for negative numbers is obtained, the sign bit is 1, and the value is reversed on the basis of the original code.
3. Complement. The complement of positive numbers is the same as the original code for positive numbers. When the complement of negative is obtained, the sign bit is 1, and the value bit is reversed plus 1 on the base of the original code.

Examples of decimal numbers +5 and 5 are represented as binary number primitives, anti-code, and complement respectively.
[+5] Original =[+5] anti-=[+5] complement =00000101b
[-5] Hara =10000101b
[-5] anti-=11111010b
[-5] complement =11111011b