Regression to the essence of Assembly series (I)-basic assembly knowledge

Source: Internet
Author: User

Interaction between CPU and external devices

  • Storage Unit Address (address information)
  • Device selection, read or write commands (Control Information)
  • Read or write data (data information)
Bus: computer dedicated connection to the CPU and other chips of the wire bus classification: Address Bus, control bus, data bus CPU read or write data process: address line-> control line-> data cable | CPU | memory | ------ address line --------> |-| ------ control line ----> ---- | | --- <---- data cable ------ |
  • The CPU sends address information A through the address line
  • The CPU sends out a memory read or write command through the control line, selects the memory chip, and notifies him that the data will be read or written.
  • The memory sends data B in unit A to the CPU or CPU through the data line to the memory.
Concept of address bus, data bus, and control bus
  • Address Bus: If a CPU has n address lines, the width of the CPU address bus is N, and the number of N memory units at most once addressing 2
  • Data Bus: If a CPU has M data lines, the width of the CPU data bus is m, and at most one data transmission M-bit
  • Control Bus: If a CPU has a c control bus, the CPU has c control over the external device.
  • The address bus width determines the CPU addressing capability.
  • The width of the Data Bus determines the CPU data transmission capability.
  • The control bus width determines the control capability of the CPU to other devices in the system.
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