Rom and ram Test Summary

Summary of ROM and ram tests: 20:02:00 Source: 21ic Author:

Before the hardware system leaves the factory, product testing is required. Before the embedded system works, self-check is generally required. Rom and ram detection are essential, however, many people have incorrect understandings about the purpose, cause, and method of the test.

Why test ROM and Ram? The general view is that due to concerns about Rom and RAM chip damages, the quality of these two chips should be verified before they are released and used. The Method for Testing Ram is to write and read each memory unit and check whether the data can be written correctly. The method for testing Rom is to accumulate the value of each storage unit and compare it with the checksum. This kind of program cannot be wrong, but it is superficial. The testing program compiled here is incomplete. In general, the ROM and RAM chips are not damaged, and the probability of using defective products is relatively small. Most of the problems that really occur are other hardware components. Therefore, testing ROM and Ram is often excited.

Rom Test
The true purpose of Rom testing is to ensure program integrity.
Embedded Software and startup code are stored in the Rom, which cannot guarantee long-term stability and reliability, because the hardware is doomed to be unreliable. Taking Flash ROM as an example, it will cause program volatility due to the following two main reasons:

1. Radiation. Radiation itself is working in the radiation environment/transportation process (such as being inspected by X-ray machines when Customs passes ).
2. Storage becomes invalid after a long period of storage. Some 0 and 1 bits are flipped by themselves.
In any case, the programs stored on the hardware are unreliable. If it cannot be run at all, it will not cause too much loss. If you are afraid that the program can run, but some key data/key code segments are damaged, causing fatal errors. To this end, we must ensure that 100% of the running programs are not damaged at the software level before the program works normally, so that the programs to be run are written at the beginning.

There are many methods to ensure program integrity, such as CRC verification (-16 and-32)/accumulation and verification (shift accumulation) for all programs, as long as the mathematical error probability is very low, the project can be considered as a complete program.

After the program integrity test is passed, the crash will prove that the Rom is not damaged. That is, testing whether the Rom is damaged is only a by-product test and is not the main purpose.

RAM testing

The real purpose of testing Ram is to ensure the reliability of the hardware system.

Ram is really not easy to break. So far I have not seen a system exception caused by Ram corruption. However, most problems can be reflected through Ram tests. Think about the error when the hardware is produced/inserted into the backboard! Are you more likely to have problems with your board! Consider the following:
1. The production process is too close, and the passing hole is broken. The distance from the adjacent signal line does not meet the line rules and even is online.
2. Signal line adhesion caused by tin.
3. Poor contact caused by virtual welding/missed welding.
4. If you do not follow the procedure, the handwheel is printed on the high-frequency online.
5. The Board does not blow when it is dirty, and covers a layer of dust (containing metal particles ).
......
These phenomena are interesting. Here are some examples:
1. The address line A0 and A1 are stuck. The data read from xxx00, xxx01, and xxx10 are exactly the same.
2. D0 and D1 cables are attached. If one of D0 and D1 is 0, both lines are 0.
3. Poor contact. Time is good or bad.
4. The surface of the device is not clean and residual flux is available. Low-speed access is normal, and heavy-load and high-speed access frequently crashes.

In short, the board we make will have an error opportunity in production and use, so we must test before leaving the factory, and we must perform self-check before use. (If you do not make actual products but lab samples, you can simplify the process .)

How to test Ram? Write a number and read it out to determine whether all problems are clearly not detected. It is not easy for a single test data to cover all the test content, not to mention locating the cause of the error (poor Ram, address/data line adhesion, poor contact ). Good tests should try to measure adhesion, Ram bad, board high frequency characteristics.

The method I summarized is as follows: (for example, test a FFH-byte RAM)

First, test the address line,
1. Slide '0' and randomly select a number such as 55 and AA, and write them to Feh, FDH, FBH, f7h, EFH, DFH, BFH, and 7fh address units in sequence, write the address as a binary number, and you can see that bit 0 slides from low to high on the address bus, that is, '0. The purpose is to test whether these address lines are stable and normal when they are changed to 0 in turn. When each line is changed from 1 to 0, a forward occurs. If the down direction is not well controlled, an error occurs at a high frequency. The address line on a single board may not be as long as it is, and the downstream punch will not be exactly the same. Therefore, each line is separately used to test the Compaction performance.

2. '1' slide and select a random number such as 55 and AA, write the addresses in 1 h, 2 h, 4 h, 8 h, 10 h, 20 h, 40 h, and 80 h in sequence, and write the addresses as binary numbers, we can see that bit 1 slides from low to high on the address bus, that is, '1 ., The purpose is to test whether these address lines are stable and normal when they are changed to 1 in sequence. When each line changes from 0 to 1, the upper line will be generated. If the upper line is not well controlled, it will cause errors at high frequencies. The address line on the board may not be as long as it is, so the upper line will not be the same. Therefore, each line will test the upper line performance separately. The upstream and downstream are different indicators. Test them separately.

3. "Change from 0 to 1": select a random number such as 55 and AA, write it to the FFH unit, then write it to the 00h unit, and then write it to the FFH unit. Write the address as a binary number. You can see that the address line changes from '0' to '1 '. According to the signal processing theory, the voltage step jump contains an infinite wide band spectrum, in which the high-frequency part generates external radiation, which is an interference source and has a great impact on the adjacent line. Generally, address lines are bundled for cabling, and sudden changes may cause maximum interference. The address line changes from '0' to '1', which has the greatest impact on interference, upstreaming, and fan-out current.

4. "Change from full 1 to full 0". Next to the previous step, randomly select a number such as 55 and AA and write it to the unit of 00h. Write the address as a binary number, and you can see that the address line changes from '1' to '0', resulting in maximum downstream interference.

5. "Adhesion test ". Write different data to different address units in sequence and read and judge the data, such as: 1, 2, 3, 4... this step tests the performance of RAM. Note: Do not use the same data for testing. Otherwise, no adhesion is detected.

6. Optional "all 0, all 1, continuous, high-speed change ". The purpose is to simulate the worst case (large fan current, strong interference, top/bottom punch ).

Then, test the data line (the principle is the same as that of the test address line, and the data line adhesion is tested in steps 1 and 2)

1. '0' slide, write Feh, FDH, FBH, f7h, EFH, DFH, BFH, and 7fh to a fixed address in sequence, and read and judge them.
2. '1' slide, write 1 h, 2 h, 4 h, 8 h, 10 h, 20 h, 40 h, 80 h to a fixed address in sequence, and read and judge.
3. "All 0 to all 1", all units are set to 1 (reset first and then set to 1 and read for judgment ).
4. "Change from full 1 to full 0", and clear all units (clear and read the Judgment ).
5. Optional "all 0, all 1, continuous, high-speed change ". Writes all '0' and all '1' to a certain unit at high speed, and ends with all '0.

Now, the RAM test is complete and all storage units are cleared.

There is plenty of room for the Factory Inspection Program. For example, you can add the error locating code to automatically identify the cause and location of the error.
The high-frequency characteristics of each slice vary with the production process error (such as making board, material, welding and assembly) and usage. The high-frequency characteristics of a board vary in different situations.

To sum up, in addition to testing the performance of RAM, most of the Code tests the hardware reliability of a single board.

If you do not care about high-frequency features, you can use the original test method (if the test data is not selected, the data line may not be tested), but you should realize that, the main object to test Ram is not the performance of Ram itself, but the hardware and line of the card connecting to ram.

The above is a summary of my actual work experience. I will write it out and discuss it with you. please correct me if there is anything wrong!

Source program (pseudo code)
// Test Rom
Testrom ()
{// Accumulate and verify with shift
Sum = 0;
For (I = 0; I <maxramsize; I ++ ){
Sum = sum + ram [I];
Sum = sum> 1;
}
If (sum = checksum) printf ("Rom test OK! ");
Else printf ("Rom test error! ");
}

// Test Ram
Testram ()
{
// Address line test
'0' slide;
'1' slide;
"Change from 0 to 1 ";
"Change from full 1 to full 0 ";
"Adhesion test ";
Optional ";

// Data line test
'0' slide;
'1' slide;
"Change from 0 to 1 ";
"Change from full 1 to full 0 ";
Optional. "Full 0, full 1, continuous, high-speed change"
}