s3c2440 ADC (Analog-to-digital converter)

Source: Internet
Author: User

This part of the content is transferred from ZHAOCJ's blog, thanks! Address: http://blog.csdn.net/zhaocj/article/details/5495730

  

A/D conversion, also known as modulo/number conversion, is the conversion of analog signals into digital signals that can be processed by a computer. The s3c2440 integrates a 8-Channel 10-bit CMOS A/D converter with a maximum conversion rate of 500KSPS under a 2.5MHz A/D converter clock. The A/D converter supports on-chip sampling-hold function and power-down mode operation.

Has the following characteristics:

Resolution: 10 bit

Differential linearity Error: ±1.0LSB

Integral linearity error: ±2.0LSB

Maximum conversion rate: 500KSPS

Low power consumption

Supply Voltage: 3.3V

Analog input Range: 0~3.3v

On-chip sampling-hold function

Normal Conversion Mode

Separated x/y direction conversion mode

Automatic (sequential) x/y direction conversion mode

Wait for interrupt mode

For s3c2440, the implementation of A/D conversion is relatively simple, the main application is the ADC control register Adccon (1) and ADC conversion data Register ADCDAT0 (2).

Figure 1 ADC Control Register (ADCCON)

  the 15 bit, which identifies whether the A/D conversion is complete.

The first 14 bits, which are used to enable prescaler.

Section 6~13 bits, stored is the Prescaler value, because the A/D conversion speed can not be too fast, so to pass the prescaler processing can get the correct a /D conversion speed, for example, we want to get A/D conversion frequency of 1MHz, The value of the Prescaler should be 49.

< Span lang= "en-US" > 3~ 5, which means a/d conversion.

< Span lang= "en-US" > 2-bit, which enables the standby mode of a/d conversion.

< Span lang= "en-US" > < Span lang= "en-US" > 1-bit, used for reading operations to enable the start of a/d conversion.

< Span lang= "en-US" > < Span lang= "en-US" > 0 bits, which is in section 1 bits are cleared to enable the a/d conversion.

< Span lang= "en-US" > < Span lang= "en-US" > /span>

< Span lang= "en-US" > < Span lang= "en-US" > A/D conversion time calculation:

< Span lang= "en-US" > < Span lang= "en-US" >

< Span lang= "en-US" > < Span lang= "en-US" > A/d converter frequency = 50MHz/(49+1) = 1MHz /span>

< Span lang= "en-US" > < Span lang= "en-US" > conversion time = 1/(1MHZ/5 cycle) = 1/200khz = 5us

< Span lang= "en-US" > < Span lang= "en-US" > note: Second/ The D converter is designed to work at a maximum of 2.5MHz clocks, so the conversion rate can be up to 500KSPS (sampling times per second).

< Span lang= "en-US" > < Span lang= "en-US" > Description: Why is the 5-cycle period in the above formula? Looked for a long time and found an explanation:

< Span lang= "en-US" > < Span lang= "en-US" > a/d converter Freq=1mhz, but conversion time=1/(1MHZ/5 cycles), how this 5 cycles, and 1/frequency No, it's time. Originally is the basic concept is unclear, here the 1MHZ is only the system through our AD preset division after the ad clock frequency, in 2440 the maximum can reach 2.5MHZ, and our conversion time is not a reciprocal relationship. The conversion time includes the time that the ad was established (with several clock cycles), the time of a one-bit conversion (with a few clock cycles), the time to save the data (and then a few clock cycles), which in 2440 would add up to 5 clock cycles, so there would be a formula above. In addition, the SPS unit is the ADC's parameter: The number of analog-to-digital converters per second (sample rate). Up to 500KSPS in 2440. < Span lang= "en-US" > < Span lang= "en-US" > "

< Span lang= "en-US" > < Span lang= "en-US" > /span>

< Span lang= "en-US" > < Span lang= "en-US" > register adcdat0 low 10 bits for storage a/d converted data.

Figure 2 ADC Conversion Data Register (ADCDAT0)

Taking AIN0 as an example, when the analog is passed through the AIN0 channel into A/D converter, the conversion results are stored in the low 10 bits of the Adcdat register, and the s3c2440 ADC Converter analog input range is 0~3.3v, Therefore, the low 10-bit value of the Adcdat register 1023 corresponds to 3.3V, which is linearly related.

s3c2440 ADC (Analog-to-digital converter)

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