S5pc100 bare board full strategy SPI

Author: Zhao Xiaoqiang,Hua Qing vision embedded training center lecturer.

The following is a program for s5pc100 to operate m25p10 without system SPI. Map. LDS, makefile, s5pc100, and files are required. Use the V7 cross tool chain. The above files can be downloaded at www.farsight.com.cn.

# Include "s5pc100. H"
# Include "s5pc100. H"
# Include "UART. H"
# Define spi0_clk_gate_on (1 <6)
# Define Max 50
/* Flash Opcodes .*/
# Define opcode_wren 0x06/* write enable */
# Define opcode_wrda 0x04/* write disable */
# Define opcode_rdsr 0x05/* read Status Register */
# Define opcode_wrsr 0x01/* write Status Register 1 byte */
# Define opcode_norm_read 0x03/* read data bytes (Low Frequency )*/
# Define opcode_fast_read 0x0b/* read data bytes (high frequency )*/
# Define opcode_pp 0x02/* page program (up to 256 bytes )*/
# Define opcode_be_4k 0x20/* Erase 4kib block */
# Define opcode_be_32k 0x52/* Erase 32kib block */
# Define opcode_chip_erase 0xc7/* Erase whole flash chip */
# Define opcode_se 0xd8/* sector erase (usually 64kib )*/
# Define opcode_rdid 0x9f/* read jedec id */
/* Status Register bits .*/
# Define sr_wip 1/* write in progress */
# Define sr_wel 2/* write enable latch */
Extern void printf (const char * FMT ,...);
Void cfg_gpio (void)
{
/* Set GPB [0 ~ 3] to support spi0 */
Gpb. gpbcon = (GPB. gpbcon & 0xffff0000) | 0x2222;
}
Void set_clk (void)
{
/* Enable clk_gate, spi_clksel = pclk; spi_scaler = 0 */
Clk_gate_d1.clk_gate_d1_4 | = spi0_clk_gate_on;
Spi0.clkcfg & = 0x0;
}
Void delay (INT times)
{
Volatile int I, J;
For (j = 0; j <times; j ++ ){
For (I = 0; I <100000; I ++ );
I = I + 1 ;}
}
Void disable_chip (void)
{
/* Disable chip */
Spi0.slavesel | = 0x1;
Delay (1 );
}
Void enable_chip (void)
{
/* Enable chip */
Spi0.slavesel & = ~ 0x1;
Delay (1 );
}
Void soft_reset (void)
{
Spi0.chcfg | = 0x1 <5;
Delay (1 );
Spi0.chcfg & = ~ (0x1 <5 );
}
Void pai_spi0 (void)
{
Soft_reset ();
Spi0.chcfg & = ~ (0x1 <4) | (0x1 <3) | (0x1 <2 ));
Spi0.chcfg & = ~ 0x3;
Spi0.modecfg = (spi0.modecfg &~ (0x3 <17) | (0x3 <29) | (0x0 <17) | (0x0 <29 );
Spi0.slavesel & = ~ (0x1 <1 );
Spi0.clkcfg | = 1 <8;
}
Void transfer (unsigned char * data, int Len)
{
Int I;
Spi0.chcfg & = ~ (0x1 <1 );
Spi0.chcfg = spi0.chcfg | 0x1; // enable Tx and disable RX
Delay (1 );
For (I = 0; I <Len; I ++ ){
Spi0.txdata = data [I];
While (! (Spi0.status & (0x1 <21 )));
Delay (1 );}
Spi0.chcfg & = ~ 0x1;
}
Void receive (unsigned char * Buf, int Len)
{
Int I;
Spi0.chcfg & = ~ 0x1; // disable TX
Spi0.chcfg | = 0x1 <1; // enable RX
Delay (1 );
For (I = 0; I <Len; I ++ ){
Buf [I] = spi0.rxdata;
Delay (1 );}
Spi0.chcfg & = ~ (0x1 <1 );
}
Void read_id (void)
{
Unsigned char Buf [3];
Int I;
Buf [0] = opcode_rdid;
Soft_reset ();
Enable_chip ();
Transfer (BUF, 1 );
Receive (BUF, 3 );
Disable_chip ();
Printf ("mi = % x \ TMT = % x \ TMC = % x \ t \ n", Buf [0], Buf [1], Buf [2]);
}
Void erase_sector (int addr)
{
Unsigned char Buf [4];
Buf [0] = opcode_se;
Buf [1] = ADDR> 16;
Buf [2] = ADDR> 8;
Buf [3] = ADDR;
Enable_chip ();
Transfer (BUF, 4 );
Disable_chip ();
}
Void erase_chip ()
{
Unsigned char Buf [4];
Buf [0] = opcode_chip_erase;
Enable_chip ();
Transfer (BUF, 1 );
Disable_chip ();
}
Void wait_till_write_finished ()
{
Unsigned char Buf [1];
Enable_chip ();
Buf [0] = opcode_rdsr;
Transfer (BUF, 1 );
While (1 ){
Receive (BUF, 1 );
If (BUF [0] & sr_wip ){
// Printf ("write is still in progress \ n ");}
Else {
Printf ("write is finished. \ n ");
Break;
}
}
Disable_chip ();
}
Void enable_write ()
{
Unsigned char Buf [1];
Buf [0] = opcode_wren;
Enable_chip ();
Transfer (BUF, 1 );
Disable_chip ();
}
Void write_spi (unsigned char * data, int Len, int ADDR)
{
Unsigned char Buf [4];
// Pai_spi0 ();
Soft_reset ();
Enable_write ();
/**/
Erase_chip ();
Wait_till_write_finished ();
Buf [0] = opcode_pp;
Buf [1] = ADDR> 16;
Buf [2] = ADDR> 8;
Buf [3] = ADDR;
// Pai_spi0 ();
Soft_reset ();
Enable_write ();
Enable_chip ();
Transfer (BUF, 4 );
Transfer (data, Len );
Disable_chip ();
Wait_till_write_finished ();
}
Void read_spi (unsigned char * data, int Len, int ADDR)
{
Unsigned char Buf [4];
// Pai_spi0 ();
Soft_reset ();
Buf [0] = opcode_norm_read;
Buf [1] = ADDR> 16;
Buf [2] = ADDR> 8;
Buf [3] = ADDR;
Enable_chip ();
Transfer (BUF, 4 );
Receive (data, Len );
Disable_chip ();
}
Int main ()
{
Unsigned char Buf [10] = "home \ n ";
Unsigned char data [10] = "morning \ n ";
Uart0_init ();
Printf ("AAAAA \ n ");
/* Initialize spi0 */
__Gpio ();
Set_clk ();
Pai_spi0 ();
While (1)
{
Read_id ();
Write_spi (BUF, 4, 0 );
Read_spi (data, 4, 0 );
Printf ("read from SPI: % s", data );
}
Return 0;
}

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