See the core mechanism of 10-Gigabit Ethernet Switches

Source: Internet
Author: User

Today, many 10-ge Ethernet switches can provide high-speed connection ports that support fast Ethernet or FDDI. The switch also provides more advanced functions, such as virtual lan vlan) and higher performance.

The emergence of 10-ge switches completely realizes the convergence of private networks to the public network, and it can provide a throughput of more than one thousand G in one second, which is not supported by traditional switches. As compatible with the latest Ethernet technology, 10-Gigabit Ethernet is not only a "high-speed rebuild" of Ethernet. For the first time, 10-Gigabit Ethernet technology was proposed, this is the first time that a private network is integrated into a public network.

As a core network device, 10-Gigabit Ethernet switches not only support 10-Gigabit access modules on existing 1-gigabit Ethernet switches, but also require a new generation of system design, this includes updates from the switch architecture, the second/third layer technology, to the next generation IPv6 default support and effective bandwidth management.

In recent years, Ethernet technology, from LAN to man, from man to Wan, is occupying more and more markets at an astonishing speed, especially in Enterprise Networks and operator networks, ethernet technology is increasingly becoming an uncontroversial choice.

From fast Ethernet to Gigabit Ethernet and then to 10 Gigabit Ethernet, technical updates meet the needs of high-speed Bandwidth growth and new-generation applications brought about by the new generation of Internet technology. Let's take a look at the next-generation technology in 10-Gigabit Ethernet switches.

A user invests in purchasing a 10-Gigabit Ethernet switch because it needs to be able to process data packet forwarding at the same speed under any circumstances and can process a new generation of Internet applications, such as Multicast Applications, streaming media applications, IP speech, and next-generation Internet IPv6 applications; at the same time, the switch also needs to provide the best investment protection, occupy the least Rack Space, save power as much as possible, and be able to see the user's traffic.

Apparently, a Gigabit Switch cannot accommodate high-capacity 10-Gigabit port line rate forwarding. Currently, a Gigabit Switch can only provide dozens to hundreds of Gbps Throughput, the next-generation 10-Gigabit switch can handle more than one thousand Gbps of throughput per second. Because such a large data throughput cannot achieve line rate forwarding with the highest CPU, we need a dedicated network integrated circuit chip (ASIC ).

At the same time, you need to distribute data forwarding tasks to various modules. The distributed system has different implementation methods. One is to transfer common tasks to a local module in the traditional switch technology, which can use the local switching matrix.

The entire switch Switching Matrix can also be used, but such an approach is obviously not the best; another approach is to thoroughly distribute all data-forwarded tasks to each module and implement it using the local large-capacity Switching Matrix. Therefore, the large-capacity distributed switching structure is the most effective. 10-ge switches should not only provide large-capacity backplane switching matrices, but also large-capacity Local switching matrices, non-blocking parallel switching matrix is currently the most advanced technology.

At the same time, ASIC provides dedicated chips instead of CPUs for data forwarding. The ASIC's measure is to process all traffic forwarding at the chip level as much as possible, but the problem is that the switch cannot be modified once the ASIC is designed.

Therefore, we will choose to process as many data forwarding design products as possible. We will consider IPv4 packet exchange and routing, IP multicast packet, whether chip-level data delivery and QoS can be achieved, and whether chip-level data speed limiting can be achieved.

Whether the data speed limit can be implemented in a variety of ways, whether it can implement policy routing, and whether it can implement access list control (ACL) using the credit system instead of the door system ), whether a new generation of IPv6 can be switched and routed, or even whether it can collect data traffic at the chip level. The excellent ASIC design reflects the highest technology of switch design.

However, the distributed switching system and excellent ASIC Technology are far from enough, because the ASIC Technology cannot be changed once implemented, new technical standards and new application modes will be fully processed by the CPU, which often results in performance loss and business pain for users.

The solution can be to purchase a new generation of ASIC design modules, but hardware upgrades may result in expensive additional investment. The latest 10-Gigabit Ethernet switch will use Field Programmable Gate Array Chip (FPGA) to solve this defect, and upgrade the new standard to hardware, providing the best protection for user investment.

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