Simple verification of K60 internal clock operating frequency

Start a new year ~ K60 has been cool in my hand for many days. I haven't finished it for a long time. Today, I 've played it like a baby. It's a little bit of a success. I 'd like to share it with you, because it is only a small skill, it is not included in the series from scratch.

In fact, I used to pay attention to this when I started the code. But I didn't try it myself at that time. I always felt that there was no theory, but I didn't know how to do it. As a matter of fact, many people have found this problem. I feel that when I look at this thing, I am too lazy to verify it, I personally think that this bad habit is not only reflected in people who are just getting started, but also by many experts. My personal suggestion is to try to overcome this bad habit (although I also have this problem, I am sweating and changing _ ing ), because we are engaged in electronics and engineering, isn't it relying on our hands-on capabilities? We can't leave it cold when we rely on the guys who eat, and we feel rational. Haha ~

Next, let's go to the question. When we set the system clock through the MCG module, we often cannot accurately determine whether the system running clock matches our own settings. At this point, someone may propose to use the software delay to constantly flip an I/O state for verification. Well, I can only smile a little, huh, huh ~ Since flykar provides us with a convenient way (not just flykar, but in fact many single-chip computers provide this function, here we can use the stuff of the flykar family to blow it to others), why not.

K60 (144pin, because some models may be dropped due to the limited number of pins. Here we provide two reusable Io pins (pta6 and ptc3) it is used to output trace_clock and fb_clock. trace_clock is the tracing clock used for debugging. You can set it to mcg_clock_out or core_clock/system_clock (Note that the actual output of trace clock is a two-byte internal clock.); Fb_clock is flexbus
Clock is the bus clock. The text is too long. below is the (PIN reuse diagram), haha ~

We can see that trace clock is the seventh reuse function (ALT7), and FB_Clock is the fifth reuse function (ALT5 ). Now the configuration on the hardware is ready. Let's take a look at how the official software provided by Apsara is implemented. This part of the software needs to be found in the sysinit. c file, one of the startup code files (here, I will complain about the trouble that the official version of feiskar has provided. At the end, we can see two subfunctions and calls in the program ,:

After setting as shown in the software, the output can be normal. In software MCG initialization, the kernel clock I set is 100 MHz (So trace clock is 50 MHz, as mentioned above), and the bus clock is 50 MHz (FB_Clock ), next let's take a look at the waveforms I have taken (sweat, with a cell phone, the effect is normal, without a USB flash drive, you can't export them directly from the oscilloscope, just look at it first, do not forget to bring a USB flash drive next time, haha ):

Trace clock Waveform

FB_Clock Waveform

The above simple steps can be used to verify the Running frequency of the K60 internal clock, which is very convenient. However, as shown in the figure, the waveform has a certain DC component, and the lower the frequency I tested, the smaller the DC component. I don't want to understand it. I hope some experts will give some advice on this problem, thank you.