Single chip microcomputer external extended address data bus for time-sharing (ZZ)

Time -sharing of external extended address data bus with single chip microcomputerZz:http://doc.qkzz.net/article/7c2c3384-6ae9-49b2-8f56-200d87c1830a.htm
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"Abstract" This paper analyzes the bus timing of the external expansion of single-chip microcomputer, puts forward the problem of time-sharing of address and data bus when the system is connected by bus, and illustrates the design method of data address bus circuit and corresponding program in the system expansion by example.
"keywords" single-chip microcomputer; time series; time-sharing multiplexing
"TP393", "Document identification code" A
Article number 1671-5969 (2007) 21-0191-02
　　
First, the question of the proposed
　　
80C51 Microcontroller has 4 8-bit I/O interface, respectively, P0, P1, P2, P3 port. When an external memory or I/O interface is used, the address and data are also transmitted using the I/O interface. Due to the expansion of the program, the data memory space is 64K, which requires 16 address lines, 8-bit data cable. In order to save the I/O interface, a low 8-bit address and data bus time-sharing method are adopted. That is, when reading and writing outside, the microcontroller first by the P0, P2 Port 16 address, and then through the P0 port read and write data, and requirements throughout the reading and writing process, the address can not be changed. The microcontroller external operation sequence is shown in Figure 1.
　　
It can be seen from the time series diagram that the MCU uses the output of the low 8-bit address on the P0 port, and the solution of the address latch permit signal is sent by the ale pin, but the specific hardware circuit needs to be implemented externally.
　　
Second, the solution of the idea
　　
According to different needs, the microcontroller application system needs a variety of peripheral circuits, some expansion chip without latch, and some chip has been integrated with a latch, so the solution P0 address, data time-sharing method is also different.
(a) outside the microcontroller connection latch
When there is no latch in the chip of the external expansion circuit, the address will not change during the reading and writing process of the MCU. It is known by Time series diagram 1 that when the P0 port outputs DPL, the address is latched. A latch is connected to the outside of the microcontroller. Address latch control signal ale to the control side of the latch, ale occurs when the negative jump, the latch will be a low 8-bit address latch, P0 port can be used as a data cable, the connection block diagram as shown in Figure 2.
　　
(b) Single-chip microcomputer and external expansion of the chip connected or through the latch connection
External expansion of the chip has an address latch integrated, such a circuit, the difference is large. The example of chip ADC0809 with A/D conversion is illustrated.
ADC0809 Partial Performance: 8-bit resolution, 8-way input analog switch with latch control, conversion speed depends on chip external clock frequency, clock frequency range: 10-1280khz. The internal structure of the ADC0809 is shown in Figure 3.
　　
Partial pin function:
IN0-IN8: eight analog input terminal.
ALE: Address latch signal input. When a positive pulse is usually entered into this pin, the three-bit address can be selected in the signal Adda, ADDB, ADDC input address latch, and decoding, the corresponding analog input channels.
Start: Start the A/D conversion control input. Generally to this pin input a positive pulse, rising edge reset successive comparison register, falling edge start A/D conversion.
The working sequence of the ADC0809 is shown in Figure 4.
　　
Through the analysis of the internal structure of the ADC0809 and the sequence diagram, there are two kinds of interfaces between this kind of chip and the MCU.
1. Direct connection with single chip microcomputer
Figure 5 is an interface directly connected to the P0 port of the microcontroller by the ADC0809 analog input channel. Since the ADC0809 has an output tri-state Latch, its 8-bit data output line can be connected to the 89C51 bus. The decoding inputs A, B, and C of the analog input channel address in this figure are also provided directly by p0.0~p0.2. Control timing Diagram 1, Figure 4 shows that, when the microcontroller output, the ADC0809 ale pin on the same leaf appears the address latch allows the signal, and then the address on the P0 port disappears, when the 8-bit data output, The P2.0 of the microcontroller is used as the chip-selection signal, and a positive pulse is added to the ale and start pins of the ADC0809, with or without operation. Latches the low 3-bit data on the P0 port, which is the channel selection. Since the ale and start are connected together, the ADC0809 also initiates the conversion at the same time as the latch channel.