Smart power management technology-Principles and power management --

Smart power management technology-Principles and power management --
I. Terminology
1. Low Dropout Regulator)
Low-voltage differential Linear Voltage Regulator
Advantages: good stability, fast load response, and Low Output Ripple

Disadvantage: low efficiency. The input/output voltage difference cannot be too large.

2. DC-DC (Direct Current to Direct Current)
DC to DC
Advantage: High Efficiency and wide input voltage range

Disadvantage: the load response is worse than that of the drop-down list, and the output ripple is larger than the drop-down list.

3. SDP (Standard downstream port)
This type of Port's D + and D-lines have a drop-down resistance of 15 thousand euros
Throttling value: 5mA when suspended, 100mA when connected, 500mA when connected and configured as high power

4. DCP (dedicated charging port)
This port does not support any data transmission, but can provide a current above 1.5A. The ports are short-circuited between the D + and D-wires without enumeration.

5. CDP (downstream charging port)
This port supports both high-current charging and data transmission that is fully compatible with USB2.0.
The port has a drop-down resistance of 15 thousand euro required for D + and D-communication, and an internal circuit for switching the charger detection phase. The internal circuit allows portable

The device separates CDP from other types of ports.

Ii. PMU startup and initialization
1. PMU boot Conditions
(1) The ACIN voltage ranges from low to high and reaches the valid value.
(2) The VBUS voltage ranges from low to high and reaches the valid value.
(3) Long press the power key

2. PMU initialization process

3. External Power Supply detection conditions and Path Selection
1. ACIN and VBUS detection conditions
(1) When ACIN <3.5V, PMIC considers that ACIN does not exist;
(2) When VBUS <3.5V, PMIC considers that VBUS does not exist;
(3) When ACIN is upgraded from low to> 3.75V, PMIC considers ACIN to come;
(4) When VBUS rose from low to> 3.75V, PMIC considers VBUS to come;
(5) When ACIN or VBUS comes or disappears, PMIC will interrupt;

2. Conditions for opening and closing the ACIN and VBUS paths
(1) When ACIN <VBAT + 0.05V, ACIN path is disabled;
(2) When ACIN> VBAT + 0.25V, it indicates that ACIN is available;
(3) When VBUS <VBAT + 0.05V, VBUS path is disabled;
(4) When VBUS> VBAT + 0.05V, VBUS is available;

3. VBUS pressure limiting function
(1) The VBUS pressure limit function is always effective and can be throttled;
(2) Traffic limit: 100/500/900/1500/2000/2500/3000/3500/4000mA

4. Selection of ACIN and VBUS paths
(1) Each path from ACIN and VBUS to IPSOUT has a regulator with the target of 5 V;
(2) When the input voltage is <= 5.06 V, IPSOUT = (input voltage-60mV );
(3) When 6.3 V> input voltage> 5.06 V, IPSOUT = 5.0 V;
(4) When the input voltage is greater than 6.3 V, IPSOUT = 5.0 V, PMIC causes overvoltage interruption;
(5) When the input voltage is greater than 7 V, IPSOUT = 5.0 V, PMIC is directly shut down;
(6) If ACIN and VBUS both exist and are available, select ACIN regardless of the battery condition;
(7) When ACIN is from high to low <4.3V, open VBUS patch immediately;
When ACIN comes and becomes available, PMIC closes VBUS and restores the ACIN path;

5. IPSOUT and BAT Path Selection
(1) PMIC monitors the voltage relationship between IPSOUT and BAT;
(2) When IPSOUT is lower than the VBAT-0.04V, it indicates that the external power supply ACIN or VBUS cannot meet the power consumption requirement of the system and

Turn on the BAT to IPSOUT switch. Once IPSOUT> = VBAT-0.01 V, immediately turn off the switch;

6. Internal Resistance requirements of various power supply channels
(1) resistance between BATSENSE and LOADSENSE, used to monitor battery current, and constant charging current;
(2) The BATSENSE/LOADSENSE cable must be close to the two ends of the sampling resistor as much as possible, and close to the IC pipe foot;
(3) The internal resistance of ACIN path should be less than 0.07ohm (70mΩ );
(4) The internal resistance of VBUS path should be smaller than 0.1ohm (100mΩ );
(5) BAT-IPSOUT internal resistance less than 0.03ohm (30m Ω );

Iv. PMIC charging mechanism
1. PMIC Charging Process
(1) PMIC built-in 2A PWM charger, which can work in linear Charging mode;
(2) When VBAT is <2.9 V, the current is 1/10 of the set value of the charging current;
(3) When VBAT> 3.0 V, PMIC enters the constant current charging, and the current is the current set for the Register;
(4) When VBAT> Vrch and the charging current is less than 10% of the set current, the charging is completed;
(5) When VBAT = Vtarget, Charger enters the constant pressure mode,
When the charging current is reduced to 10% of the set current, the charging ends;

2. Handling of charging exceptions
(1) Once the pre-Charging mode is enabled, PMIC enables charger timer1. If the pre-Charging mode is enabled within 50 minutes, PMIC cannot enter the constant current mode from the pre-Charging mode.

PMIC enters the battery activation mode and sends IRQ, indicating that the battery may be damaged;

(2) In battery activation mode, charger always charges the battery at 5mA until VBAT> Vrch is enabled.

Only when ACIN and VBUS disappear;

V. RDC computing
1. Battery path impedance calculation conditions
(1) the external power supply is available and in the charging status;
(2) The charging current is greater than 300mA;
(3) The BAT voltage ranges from 3.5V to 4.1V;
(4) The Charging wait time is sufficient. The default value is 180 seconds;

2. path impedance detection process
(1) Determine whether the detection conditions are met;
(2) record the battery voltage and charging current, and take the average value;
(3) Disable charger and delay. The default value is 3 minutes;
(4) record the battery voltage and current, and take the average value;
(5) Calculate the RDC value. Rdc = dV/dI;

3. Derivation of RDC Formula
(1) Vbat1 = Ocv + i1 * Rdc;
(2) Ocv = Vbat2 + i2 * Rdc;
(3) Vbat1-Vbat2 = (i1 + i2) * Rdc;
(4) Rdc = (Vbat1-Vbat2)/(i1 + i2) = △v/△i;

4. RDC correction
If the real-time OCV power usage percentage is detected before and after the status switch is greater than 4%

The RDC correction process is calculated. The RDC is partial to an hour. Each time the RDC increases by 4 steps, the RDC decreases by 3 steps;

Vi. OCV/kulunmeter mutual Calibration Process
1. The interaction process in the charging status
(1) The ratio of OCV is greater than 94%, and the ratio of the database to the memory is smaller than the ratio of OCV
--> Increase the percentage of the database to 1% every minute until 99%
(2) The ratio of memory to memory is greater than 94%, and the ratio of OCV is smaller than the ratio of memory to memory.
--> HOLD the ratio of the memory to the memory and HOLD the value of the accumulators until the ratio is the same as that of the OCV.
(3) The ratio of OCV is 100%, and the ratio of Kulun is 100%.
--> HOLD the value of the accumulators, that is, the counter value of the Kulun count does not change;
(4) The ratio of OCV is 0%, and the ratio of the Kulun is equal to 0%.
--> The ratio of the Kulun counter and the value of the accumulators are 0 until the ratio of the OCV starts to exceed 0%;

2. Mutual Calibration Process in discharge state
(1) The OCV ratio is less than the Shutdown Alarm setting register value + 8, and the ratio of the memory to the memory is greater than the ratio of the OCV
--> The ratio of the memory to the memory is reduced by 1% every one minute, and the accumulators change together until the OCV and the memory are equal,

Then, the ratio of the kulunmeter follows the ratio of the OCV.
(2) The ratio of memory to memory is smaller than the value of the alarm to be shut down setting register + 6. At the same time, the ratio of OCV is greater than that of memory to memory.
--> HOLD the ratio of the Kulun count and HOLD the value of the accumulators until the OCV and the Kulun count are equal,

Then, the ratio of the kulunmeter follows the ratio of the OCV.

VII. Actual battery capacity calibration
1. Battery Capacity and OCV-SOC curve calibration Conditions
(1) Correct RDC detection is effective
(2) access external power for charging
(3) The OCV percentage is valid and is less than the Shutdown Alarm value + 3 percentage points
(4) capacity calibration, capacity calibration status flag is 0, OCV-SOC curve calibration on time, the same

2. Capacity correction process
(1) If the OCV ratio is equal to 0, wait until the OCV ratio starts to be greater than 0.
(2) record the ratio of OCV current to P0 at this time and the number of clearing Cus is 2.
(3) charge to OCV ratio greater than capacity correction end Belgium, record at this time OCV ratio Pn, the value of Qn In the Kulun count
(4) Calculate the actual capacity, Qmax = Qn/(Pn-P0)
(5) Update the total battery capacity register

3. OCV-SOC curve correction
(1) The charge ends and the OCV percentage reaches 100%.
(2) Calculate the power ratio of OCV at all levels:
SOCi = P0 + Qi/Qmax
(3) After completion, reset SOC-OCV curve calibration status flag
(4) Update 32-level registers for OCV-SOC Curves