Software analog writing SPI timing

The ISA board connects ltc1448 using a port register, and uses software to simulate SPI timing writing data

 

# Include <conio. h> void softwaresimspiwrite (const ulonglong ulldata, // data const char bitswidth, // data width bool bleftalign, // Left Align? Bool bmsbfirst // What is the first priority?) {# Define csactive 0 // CS valid level # define clkactive 1 // CLK valid level # define dataactive 1 // data valid level # define wportaddress 660 // port address # define writedacportbit (CS, CLK, DIN)/* write port macro */\ do \ {\ byte bytedata = 0;/* construct data */\ bytedata | = (byte) (CS )? Csactive :(! Csactive) <0);/* cs in bit0 */\ bytedata | = (byte) (CLK )? Clkactive :(! Clkactive) <1);/* CLK in bit1 */\ bytedata | = (byte) (DIN )? Dataactive :(! Dataactive) <2);/* din in bit2 */\ _ outp (wportaddress, bytedata);/* write port */\} while (0 ); // The displacement mask initial processing ulonglong ullmask = 0; If (bmsbfirst) {If (bleftalign) ullmask = 0x80000000000000000000ui64; else ullmask = 1ui64 <(bitsWidth-1 );} else {If (bleftalign) ullmask = 1ui64 <(64-bitswidth); else ullmask = 1ui64;} writedacportbit (0, 0, 0 ); // set the cs clk data to invalid writedacportbit (1, 0, 0); // set the CS valid CLK data to invalid (Int I = 0; I <bitswidth; I ++) {char idata = (ulldata & ullmask )? 1:0; // data retrieval writedacportbit (1, 0, idata); // valid CS valid CLK valid data valid writedacportbit (1, 1, idata ); // CS valid CLK valid data valid ullmask = bmsbfirst? (Ullmask> = 1): (ullmask <= 1); // displacement mask} writedacportbit (1, 0, 0 ); // set valid cs clk data to invalid writedacportbit (0, 0, 0); // set invalid cs clk data} void writeltc1448 (const word dataa, const word datab) {DWORD dwdata = (dataa & 0 xffful) <12) | (datab & 0 xffful); softwaresimspiwrite (dwdata, 24, false, true );}