Where is the page table in memory? The OS is the clearest, and the MMU should be clear. The linear address is in the Addressing page table, the linear address is also generated by the OS, and then the CPU passes this linear address to the MMU, because the linear address can be computed by calculating the index in the collection of the page table, thus addressing the page table. The MMU takes the page out of itself by calculating the page table with some flag bits of the linear address, and concludes that this is not a valid page table. Normally the MMU gets the page table from the TLB, and if the page table is calculated to be invalid, the page table is fetched from memory, and the TLB is flushed, and the new page table is written to the TLB. The MMU then resolves the physical address to the CPU. In fact, the CPU for the MMU, the CPU is only responsible for the legitimate linear address to the MMU, and the MMU is only responsible for the legitimate physical address to the CPU.
Some things about the MMU