SPI Driver Writing Essentials

Digression: In the face of success and failure, a person has no " champion Heart ", directly affect his performance.

A few weeks ago to analyze the Linux SPI driver Framework, it is clear why, for such a huge framework, not every line of code to knock on their own, because the predecessors have already set up the framework, as the driver of the developers we just need to figure out which part of the need to modify or re-write it OK.

Based on the concept of object-oriented design of Linux kernel, the overall design idea of SPI is as follows:

Section ①: The kernel abstracted the SPI controller, let Spi_master become his symbol, his instantiation of the object is abruptly with the SPI controller corresponding to the Linux kernel is accustomed to integrate the controller on the SOC with an imaginary platform bus to manage, so Spi_ The instantiation of Master has to be done by Platform_device and Platform_driver.

Chewing: The platform_device here is equivalent to the static description of Spi_master: including the number of controllers, register addresses, PIN configuration, etc., this information in the form of "resources" on the Platform_device, etc. platform_ Driver found the one he was destined for. This (static description) resource is then available, and the Spi_master instance object is produced in probe with these resources. This series of process predecessors have already done, and all we have to do is change this static description platform_device to the same characteristics as the SPI controller in our Soc. That is, appropriately modify the members involved in Platform_device in ARCH/ARM/MACH-S5PV210/DEV-SPI.C.

1 //register Address of the SPI02 Static structResource s5pv210_spi0_resource[] = {3[0] = {4. Start =S5pv210_pa_spi0,5. end = S5pv210_pa_spi0 +0x100-1,6. Flags =Ioresource_mem,7     },8[1] = {9. Start =Dmach_spi0_tx,Ten. end =Dmach_spi0_tx, One. Flags =IORESOURCE_DMA, A     }, -[2] = { -. Start =Dmach_spi0_rx, the. end =Dmach_spi0_rx, -. Flags =IORESOURCE_DMA, -     }, -[3] = { +. Start =Irq_spi0, -. end =Irq_spi0, +. Flags =Ioresource_irq, A     }, at }; -  - /** - * struct S3C64XX_SPI_INFO-SPI Controller defining structure - * @src_clk_nr: Clock source index for the Clk_cfg[spi_clksel] field. - * @src_clk_name: Platform name of the corresponding clock. in * @clk_from_cmu: If the SPI clock/prescalar control block is present - * By the platform ' s clock-management-unit and not in the SPI controller. to * @num_cs: Number of CS This controller emulates. + * @cfg_gpio: Configure pins for this SPI controller. - * @fifo_lvl_mask: All TX fifo_lvl-start at offset-6 the * @rx_lvl_offset: Depends on TX fifo_lvl field and bus number * * @high_speed: IF The controller supports high_speed_en bit $ * @tx_st_done: Depends on TX fifo_lvl fieldPanax Notoginseng  */ - Static structS3c64xx_spi_info S5pv210_spi0_pdata = { the. Cfg_gpio = S5pv210_spi_cfg_gpio,//function to configure GPIO as a SPI0 pin +. Fifo_lvl_mask =0x1ff, A. Rx_lvl_offset = the, the. High_speed =1,//See s5pv210 's Manual P901: This is used to configure the CH_CFG register, mainly 210 for use from the device when ... +. Tx_st_done = -, - }; $  $ StaticU64 Spi_dmamask = Dma_bit_mask ( +); -  - structPlatform_device s5pv210_device_spi0 = { the. Name ="S3c64xx-spi", -. ID =0,Wuyi. num_resources =array_size (s5pv210_spi0_resource), the. Resource =S5pv210_spi0_resource, -. Dev = { Wu. Dma_mask = &Spi_dmamask, -. Coherent_dma_mask = Dma_bit_mask ( +), About. Platform_data = &s5pv210_spi0_pdata,//Special Spi_master Data $     }, -};

Platform_device

Section ②: Add/Modify the structure of the SPI peripheral "static description". Add/Modify in the arch/arm/mach-s5pv210/mach-smdkv210.c file SPI peripheral information. This structure is spi_register_board_info () function hangs on the boardlist, the normal is also predecessors do well. After registering the spi_master, the kernel begins to search for the SPI peripherals in the boardlist, and then registers the Spi_device with the SPI bus, which is initialized with Spi_board_info, and these processes are done by the predecessors.

1 /*2 * Take MMC SPI Peripherals as an example3  */4 Static structS3c64xx_spi_csinfo smdk_spi0_csi[] = {5[Smdk_mmcspi_cs] = {6. Line = S5PV210_GPB (1),7. Set_level =Gpio_set_value,8. Fb_delay =0x2,9     },Ten }; One Static structS3c64xx_spi_csinfo smdk_spi1_csi[] = { A[Smdk_mmcspi_cs] = { -. Line = S5PV210_GPB (5), -. Set_level =Gpio_set_value, the. Fb_delay =0x2, -     }, - }; - //Modify the content in this structure according to the specific peripherals: This depends on the user manual of the peripherals. + Static structSpi_board_info s5pv210_spi_devs[] __initdata = { -     { +. Modalias ="Spidev",/*MMC SPI, mod aliases*/ A. Mode = Spi_mode_0,/*cpol=0, Cpha=0*/ at. max_speed_hz =10000000, -         /*Connected to SPI-0 as 1st Slave*/ -. Bus_num =0,//hooking up on the SPI0 bus -. Chip_select =0, -. Controller_data = &Smdk_spi0_csi[smdk_mmcspi_cs], -     }, in     { -. Modalias ="Spidev",/*MMC SPI*/ to. Mode = Spi_mode_0,/*cpol=0, Cpha=0*/ +. max_speed_hz =10000000, -         /*Connected to SPI-1 as 1st Slave*/ the. Bus_num =1,//hooking up on the SPI1 bus *. Chip_select =0, $. Controller_data = &Smdk_spi1_csi[smdk_mmcspi_cs],Panax Notoginseng     }, -};

Spi_board_info

Section ③: Spi_master have, Spi_device also have, next is the SPI driver write a heavy task! writing the Spi_driver driver is to write a specific operation "strategy" for the specific peripherals. in the kernel source code is a reference to drivers/spi/spidev.c, the overall idea and the previous learning of the character device: Build the Spi_driver structure, and then register it in the SPI bus, build the SPI File_ The operations structure then creates an SPI character device, Spi_driver finds Spi_device to create a character device node in probe to provide to the application layer.

SPI Driver Writing Essentials