[state-Embedded notes] [017] [Makefile Project Management]

Source: Internet
Author: User

Use of Makefile

1.make can make the whole program compile, link just one command to complete

The work of 2.make relies heavily on makefile files. The Makefile file describes the compilation, linking, and other rules of the entire program so that it is automatically completed.

The composition of the Makefile

1. Rules

Targets (target):p rerequisties (dependent)

Command (commands)

Note: The command is preceded by [tab] instead of a space, otherwise the execution will be wrong

1. Pseudo-target: only targets and commands, no dependent rules are called pseudo targets, pseudo targets are usually used. Phony:targets (can also not write) marked as a pseudo-target

2. Final goal: If you have nothing behind make, run the first rule, which is called the final goal

3. Specify the target: If you want to run only one of the targets in the rule, just execute make targets to produce the corresponding target

2. Variables

1. Multiple occurrences of the component in makefile can be replaced with a variable

2. Definition of variable: name=file1 file2 ..., note "=" do not have spaces on either side

3. Use of variables: $ (name) equivalent to File1 file2 ...

4. System default Variables

[Email protected]: Indicates target (all except, all is not target name)

$^: All dependencies are indicated

$<: Represents the first dependent

5. General rules

Multiple rules can be replaced with a common rule if the commands are the same only if the target and dependent file types are different for more than one rule

%.O:%.C         arm-liunx-gcc-c $^-o [email protected]

Makefile Tips for use

1. To go back to the display, in the corresponding to go back to the command front plus @

The 2.make tool can only run the makefile or makefile file in the current directory by default, and the "-F" command is available when you want to specify that other files are running Make-f name

Obj=led.oall: $ (obj)        arm-linux-ld-tled.lds $^-  o led.elf        arm-linux-objcopy-o binary led.elf led.bin        %.O:%. S        Arm-linux-gcc-g-C $^-o [email protected]        . Phony:cleanclean:        @rm *.o *.elf *.bin

[state-Embedded notes] [017] [Makefile Project Management]

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