Step 7 of Self-writing the CPU (9)-Division instructions and Implementation ideas

I will upload my new book "Write CPU by myself". Today is 32nd articles. I try to write them every Thursday.

The sales address of Amazon is as follows. You are welcome to look around!

Http://www.amazon.cn/dp/b00mqkrlg8/ref=cm_sw_r_si_dp_5kq8tb1gyhja4

The sales address of China-pub is as follows:

Http://product.china-pub.com/3804025

The sales address of beifa is as follows:

Http://book.beifabook.com/Product/BookDetail.aspx? Plucode = 712123950 & extra = 0_s25960657

7.10 division instructions

There are two division commands, including Div and divu. The format of each command is 7-15. The command code of these two commands is special, and the 6-15bit is 0. You can determine which command is used based on the Function Code of the 0-5bit command.

• When the function code is 6'b011010, it indicates that it is a div instruction and a symbolic division operation.

Command usage: div RS, RT

Command: {hi, lo} <-RS/RT. Set the address to the value of the General Register of RS, and the value of the general register whose address is Rt, the division operation is performed as the number of symbols. The operator is saved to the Register Lo, and the remainder is saved to the Register hi.

• When the function code is 6'b011011, it indicates that it is a divu command, and it is an unsigned division operation.

Command usage: divu RS, RT

Command: {hi, lo} <-RS/RT. Set the address to the value of the General Register of RS, and the value of the general register whose address is Rt, the division operation is performed as the unsigned number. The operator is saved to the Register Lo, and the remainder is saved to the Register hi.

7.11 division command implementation idea 7.11.1 trial and commercial law

The openmips design uses trial commercial law to implement division. For 32-bit Division, at least 32 clock cycles are required to obtain division results. This section describes the general process of trial commercial law.

Assume that the divisor is m, the divisor is N, and the number of divisor is K in the warranty period (s). The calculation procedure is as follows (for convenience, the second bit of all data is called 1st bits here, instead of 0th bits ).

1. Retrieve the maximum M [k] of the devisor, and use the highest bit of the devisor minus the number n. If the result is greater than or equal to 0, the s [k] of the quotient is 1, and the opposite is 0.

2. If the result obtained in the previous step is 0, it indicates that the current subtrahend are smaller than the subtrahend, then the highest M [k-1] of the remaining value of the subtrahend is taken out, and the current subtrahend are combined as the subtrahend of the next round; if the result obtained in the previous step is 1, indicating that the current subtrahend are greater than the divisor, the result of the subtraction in the previous step is combined with the highest position M [k-1] of the remaining value of the devisor as the next round of subtrahend. Then, set K to equal to K-1.

3. The new subtrahend minus divisor. If the result is greater than or equal to 0, the s [k] of the quotient is 1. Otherwise, s [k] is 0, and the subsequent steps are repeated 2-3, until K is equal to 1.

The preceding steps can be described in Figure 7-16.

Taking 4'b1101 divided by 4' b0010 as an example, the calculation steps for trial commercial law are shown in Table 7-4.

7.11.2 implementation

Create a new module Div, in which the 32-bit division operation using trial commercial law is implemented. When the ex module in the pipeline execution stage finds that the current command is a division command, it first suspends the pipeline and sends the information such as the divisor and divisor to the DIV module to start Division operations. After division, the DIV module notifies the ex module and sends the division result to the ex module. The latter sets the write information of the HI and lo registers based on the division result, and cancels the pause of the pipeline.

7.11.3 System Structure Modification

To implement the idea in section 7.11.2, modify the system structure 7-17.

The ex module uses interfaces div_opdata1_o and div_opdata2_o to provide the divisor and divisor respectively. It also uses the interface signed_div_o to indicate whether there is a signed Division, and then uses the interface div_start_o to indicate the division operation.

After division is completed, the DIV module informs the ex module through the ready_o interface and outputs the division result through the result_o interface. The width of result_o is 64 bits, and the height of 32 bits is the remainder, low 32 bits are vendors.

The implementation code of the division command will be provided next time. Stay tuned!

Step 7 of Self-writing the CPU (9)-Division instructions and Implementation ideas