Stm32 Clock System

1. In stm32, there are five clock sources:HSI,HSE,LSI,LSE,PLL.

①HSIIt is a high-speed internal clock, RC oscillator, and the frequency is 8 MHz.

②HSEIt is a high-speed external clock, which can be connected to a Z/Ceramic Resonator or an external clock source. The frequency range is 4 MHz ~ 16 MHz. Generally, it is connected to 8 MHz.

③LSIIt is a low-speed internal clock, RC oscillator, and the frequency is 40 kHz.

④LSEIt is a Z crystal with a low-speed external clock and a connection frequency of 32.768khz.

⑤PLLThe clock input source can be HSI/2, HSE or HSE/2. The multiplier value can be 2 ~ 16 times, but its output frequency cannot exceed 72 MHz.

Among them, the 40 kHz LSI is used by the independent watchdog iwdg, and it can also be selected as the real-time clock RTC clock source. In addition, the real-time clock RTC clock source can also choose LSE, or HSE 128 division.

The stm32 has a full-speed USB Module, and its serial interface engine requires a 48 MHz clock source. The clock source can only be obtained from the PLL end. It can be 1.5 or 1, that is, when the USB Module is used, the PLL must be enabled, and the clock is configured as 48 MHz or 72 MHz.

In addition, the stm32 can also select a clock signal to be output to the MCO foot (pa.8), which can be a 2-division, Hsi, HSE, or system clock output for the PLL.

Note that when the frequency of APB is 1, its frequency doubling value is 1; otherwise, its frequency doubling value is 2.

Devices connected to apb1 (low-speed peripherals) include: power interface, backup interface, CAN, USB, i2c1, i2c2, uart2, uart3, spi2, window watchdog, timer2, timer3, timer4.

Devices connected to apb2 (high-speed peripherals) include uart1, spi1, timer1, adc1, adc2, and gpiox (Pa ~ PE), the second function IO port.

Note that although the USB Module requires a 48 MHz clock signal, it should not be a clock for the USB Module to work, but only a clock for the Serial Interface Engine (SIE. The operating clock of the USB module should be provided by apb1.

Ii. Use HSE clock and set clock ParametersProcess:

01. Reset the RCC register to the default rcc_deinit;
02. Enable the external high-speed clock crystal oscillator HSE rcc_hseconfig (rcc_hse_on );
03. Wait for the external high-speed clock crystal oscillator to work hsestartupstatus = rcc_waitforhsestartup ();
04. Set the AHB clock rcc_hclkconfig;
05. Set the high-speed AHB clock rcc_pclk2config;
06. Set the low-speed AHB clock rcc_pclk1config;
07. Set PLL rcc_pllconfig;
08. Enable PLL rcc_pllcmd (enable );
09. Wait for the PLL to work while (rcc_getflagstatus (rcc_flag_pllrdy) = reset)
10. Set the system clock rcc_sysclkconfig;
11. Determine if the PLL is a system clock while (rcc_getsysclksource ()! = 0x08)
12. Enable the peripheral clock rcc_apb2periphclockcmd ()/rcc_apb1periphclockcmd ()

3. The following is the RCC configuration function in the program of the stm32 software Firmware Library (using an external 8 MHz Crystal Oscillator)

/*************************************** ****************************************

* Function name: rcc_configuration

* Description: RCC configuration (using an external 8 MHz Crystal Oscillator)

* Input: None

* Output: None

* Return: None

**************************************** ***************************************/

Void rcc_configuration (void)

{

/* Reset the peripheral RCC register to the default value */

Rcc_deinit ();

 

/* Set the external high-speed crystal oscillator (HSE )*/

Rcc_hseconfig (rcc_hse_on); // RCC_HSE_ON--HSE crystal oscillator open (on)

 

/* Wait For HSE to start */

Hsestartupstatus = rcc_waitforhsestartup ();

 

If (hsestartupstatus = success) // success: the HSE crystal oscillator is stable and ready.

{

/* Set the AHB clock (hclk )*/

Rcc_hclkconfig (rcc_sysclk_div1); // rcc_sysclk_div1 -- AHB clock = system clock

 

/* Set high-speed AHB clock (pclk2 )*/

Rcc_pclk2config (rcc_hclk_div1); // rcc_hclk_div1 -- apb2 clock = hclk

 

/* Set the low-speed AHB clock (pclk1 )*/

Rcc_pclk1config (rcc_hclk_div2); // rcc_hclk_div2 -- apb1 clock = hclk/2

 

/* Set the delay time period of flash memory */

Flash_setlatency (flash_latency_2); // flash_latency_2 2 delay period

/* Select the cache mode for flash prefetch */

Flash_prefetchbuffercmd (flash_prefetchbuffer_enable); // prefetch indicates cache enabling

 

/* Set the PLL clock source and frequency doubling factor */

Rcc_pllconfig (rcc_pllsource_hse_div1, rcc_pllmul_9 );

// PLL input clock = HSE clock frequency; rcc_pllmul_9 -- PLL input clock x 9

/* Enable PLL */

Rcc_pllcmd (enable );

 

/* Check whether the specified RCC flag is set (the PLL prepare flag */

While (rcc_getflagstatus (rcc_flag_pllrdy) = reset)

{

}

 

/* Set the system clock (sysclk )*/

Rcc_sysclkconfig (rcc_sysclksource_pllclk );

// Rcc_sysclksource_pllclk -- select PLL as the system clock

 

/* The PLL returns the clock source used as the system clock */

While (rcc_getsysclksource ()! = 0x08) // 0x08: the PLL serves as the system clock.

{

}

}

 

/* Enable or disable apb2 peripheral clock */

Rcc_apb2periphclockcmd (rcc_apb2periph_gpioa | rcc_apb2periph_gpiob |

Rcc_apb2periph_gpioc, enable );

// Rcc_apb2periph_gpioa gpioa clock

// Rcc_apb2periph_gpiob gpiob clock

// Rcc_apb2periph_gpioc gpioc clock

// Rcc_apb2periph_gpiod gpiod clock

}

Iv. clock frequency

The internal fluctuation of 8 m in stm32f103 can reach 72 m after doubling. At present, the maximum frequency of TI's M3 series chips can reach 80 m.

In the stm32 Firmware Library 3.0, the selection of clock frequency is greatly simplified, and a lot of previous operations are carried out in the background. The system provides the systeminit () function (). However, some macro-defined settings are required before the call. The specific settings are in the system_stm32f10x.c file.

There is a definition like this at the beginning of the file:

# Define sysclk_freq_72mhz 72000000

That is, the maximum 103 series can run to 72 m

Then read the c file.
# Elif defined sysclk_freq_72mhz
Const uint32_t systemfrequency = sysclk_freq_72mhz;
Const uint32_t systemfrequency_sysclk = sysclk_freq_72mhz;
Const uint32_t systemfrequency_ahbclk = sysclk_freq_72mhz;
Const uint32_t systemfrequency_apb1clk = (sysclk_freq_72mhz/2 );
Const uint32_t systemfrequency_apb2clk = sysclk_freq_72mhz;

This defines the speed of each system when the CPU runs for 72 MB. they are: hardware frequency, system clock, AHB Bus frequency, apb1 bus frequency, and apb2 bus frequency. next, we can see this:
# Elif defined sysclk_freq_72mhz
Static void setsysclockto72 (void );

This is the function that sets the clock at 72 m. this function is called by the setsysclock () function, while the setsysclock () function is called by the systeminit () function. finally, the systeminit () function is called by you.

So the process for setting the system clock is:
First, the user program calls the systeminit () function, which is a library function. Then, after some registers are initialized in the systeminit () function, the setsysclock () function is called. according to the # define sysclk_freq_72mhz 72000000 macro definition of the setsyscsclockto72 () function, the setsyscsclock () function is complicated and complicated, the CPU is running and the speed is 72 MB. although it is a bit cumbersome, you only need to know that, to set the frequency, the program will do two things:

First: In system_stm32f10x.c # define sysclk_freq_72mhz 72000000
Second: Call systeminit ()

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