TFTLCD
TFT LCD screen commonly used communication mode mainly has 6800 mode and 8080 mode, for the TFT color display is usually used 8080 and the same port (abbreviation 80) mode
The read-write timing of 8080 mode is actually the same as LCD1602 or LCD12864. 8080 interface has 5 basic control lines and a number of data lines, the number of data lines mainly see the LCD screen using a few modes, there are 8, 9, 16, 18 four types of
FSMC
The FSMC module is capable of interfacing with synchronous or asynchronous memory and 16-bit PC memory card
Convert the AHB transmission signal to the appropriate external device protocol
Meet timing requirements for accessing external devices
All external memory shares the address, data, and control signals of the controller output, and each external device can be distinguished by a unique chip selection signal. FSMC access only one external device at any one time
The STM32 can be connected directly to the memory pins of SRAM, ROM, PSRAM, NOR Flash and NAND flash via the FSMC
external Device Address image
From the FSMC point of view, divide the external memory into four blocks of fixed size 256M bytes
mode A read and write operations
Example with pattern a
Mode A read operation:
Mode A write operation:
FSMC Configuration Steps
1. Enable corresponding PIN Gpio clock
2. Configuring GPIO Pin Mode
3. Enable FSMC clock
4.FSMC initialization
5. Memory block Enable
6. Apply TFTLCD library functions, write characters, numbers, etc.
Example
Fsmc_norsramtiminginittypedef:
Fsmc_norsraminittypedef:
void Tftlcd_gpio_init () {gpio_inittypedef gpiod = {GPIO_PIN_0 | gpio_pin_1 | Gpio_pin_4 | Gpio_pin_5 | Gpio_pin_8 | Gpio_pin_9 | gpio_pin_10 | gpio_pin_14 |
Gpio_pin_15, Gpio_speed_50mhz, gpio_mode_af_pp}; Gpio_inittypedef Gpioe = {gpio_pin_7 | Gpio_pin_8 | Gpio_pin_9 | gpio_pin_10 | Gpio_pin_11 | Gpio_pin_12 | gpio_pin_13 | gpio_pin_14 |
Gpio_pin_15, Gpio_speed_50mhz, gpio_mode_af_pp}; Gpio_inittypedef Gpiog = {GPIO_PIN_0 |
Gpio_pin_12, Gpio_speed_50mhz, gpio_mode_af_pp}; Rcc_apb2periphclockcmd (Rcc_apb2periph_gpiod | Rcc_apb2periph_gpioe |
Rcc_apb2periph_gpiog, ENABLE);
Gpio_init (Gpiod, &gpiod);
Gpio_init (Gpioe, &gpioe);
Gpio_init (Gpiog, &gpiog);
} void Fsmc_init () {fsmc_norsraminittypedef FSMC = {0};
Fsmc_norsramtiminginittypedef fsmc_readwritetimingstruct = {0}; Fsmc_norsramtiminginittypedef fsmc_writetimingstruct = {0};
Rcc_ahbperiphclockcmd (RCC_AHBPERIPH_FSMC, ENABLE); Fsmc_readwritetimingstruct.fsmc_addresssetuptime = 0x01; AddSet Settling time = 2 x hclk clock cycles fsmc_readwritetimingstruct.fsmc_addressholdtime = 0x00; Mode A is not used for fsmc_readwritetimingstruct.fsmc_datasetuptime = 0x0f;
Datast Hold time = 16 x hclk clock cycle fsmc_readwritetimingstruct.fsmc_busturnaroundduration = 0x00;
Fsmc_readwritetimingstruct.fsmc_clkdivision = 0x00;
Fsmc_readwritetimingstruct.fsmc_datalatency = 0x00; Fsmc_readwritetimingstruct.fsmc_accessmode = fsmc_accessmode_a; Access mode a fsmc_writetimingstruct.fsmc_addresssetuptime = 0x0f;
AddSet Settling time = 16 x hclk Clock cycles fsmc_writetimingstruct.fsmc_addressholdtime = 0x0f;
Fsmc_writetimingstruct.fsmc_datasetuptime = 0x05;
Fsmc_writetimingstruct.fsmc_busturnaroundduration = 0x00;
Fsmc_writetimingstruct.fsmc_clkdivision = 0x00;
Fsmc_writetimingstruct.fsmc_datalatency = 0x00;
Fsmc_writetimingstruct.fsmc_accessmode = fsmc_accessmode_a; Fsmc. Fsmc_baNK = FSMC_BANK1_NORSRAM4; Fsmc.
Fsmc_dataaddressmux = fsmc_dataaddressmux_disable; Fsmc.
Fsmc_memorytype = Fsmc_memorytype_sram; Fsmc.
Fsmc_memorydatawidth = fsmc_memorydatawidth_16b; Fsmc.
Fsmc_burstaccessmode = fsmc_burstaccessmode_disable; Fsmc.
fsmc_asynchronouswait = fsmc_asynchronouswait_disable; Fsmc.
fsmc_waitsignalpolarity = Fsmc_waitsignalpolarity_low; Fsmc.
Fsmc_wrapmode = fsmc_wrapmode_disable; Fsmc.
Fsmc_waitsignalactive = fsmc_waitsignalactive_beforewaitstate; Fsmc.
Fsmc_writeoperation = fsmc_writeoperation_enable; Fsmc.
Fsmc_waitsignal = fsmc_waitsignal_disable; Fsmc. Fsmc_extendedmode = fsmc_extendedmode_enable; The extended mode enables the FSMC to be enabled.
Fsmc_writeburst = fsmc_writeburst_disable; Fsmc.
Fsmc_readwritetimingstruct = &FSMC_ReadWriteTimingStruct; Fsmc.
Fsmc_writetimingstruct = &FSMC_WriteTimingStruct;
Fsmc_norsraminit (&FSMC); Fsmc_norsramcmd (FSMC_BANK1_NORSRAM4, ENABLE); Enable to store blocks 1 Nor/psram 4}