The
Encoder interface Mode (Encoder interface), TI1 and TI2 correspond to the tim_ch1 and TIM_CH2 channels, respectively, in the STM32 advanced Timer and the general timer. The
first, the counting rule is as follows:
Table 55 is the encoder different signal under the counting direction.
1. Count only on the TI1 edge: When the rise is triggered, if the corresponding TI2 is low, the counter is counted downward, and the corresponding high level is counted up. As shown in Fig. 2. At 0 2, the TI1 rises along the corresponding TI2 to a low level, so the counter is counted up; Similarly, at 0 3 it is the opposite.
2. In the TI1 and TI2 edge count: If TI1, TI2 rise along the capture, TI1 up the edge of the TI2 at the lower level, then up the count; TI2 up the edge corresponding to TI1 high level, up the count, so double.
Two, feature configuration
1. Set I/O port (start clock, work in timer mode, no pull)
2. Configure timer (select Encoder interface mode)
void Encoder_config () {tim_timebaseinittypedef tim_timebasestructure;
Tim_icinittypedef tim_icinitstructure;
Gpio_inittypedef gpio_initstructure; Gpio_initstructure.gpio_pin = Gpio_pin_9 |
Gpio_pin_11;
Gpio_initstructure.gpio_mode = GPIO_MODE_AF;
GPIO_INITSTRUCTURE.GPIO_PUPD = Gpio_pupd_nopull;
Gpio_init (gpioe,&gpio_initstructure);
Gpio_pinafconfig (GPIOE,GPIO_PINSOURCE9,GPIO_AF_TIM1);
Gpio_pinafconfig (GPIOE,GPIO_PINSOURCE11,GPIO_AF_TIM1);
Rcc_apb2periphclockcmd (rcc_apb2periph_tim1,enable);
Tim_deinit (TIM1); Tim_timebasestructure.tim_clockdivision = TIM_CKD_DIV1;
Single-fold mode Tim_timebasestructure.tim_countermode =tim_countermode_up; Tim_timebasestructure.tim_period = 500*4; Count cycle Tim_timebasestructure.tim_prescaler = 0;
Clock frequency tim_timebaseinit (tim1,&tim_timebasestructure);
Tim_icstructinit (&tim_icinitstructure); Tim_icinitstructure.tim_icfilter = 0; Filter, 0 means no filter tim_icinit (tim1,&tim_icinitstructure);
Tim_encoderinterfaceconfig (tim1,tim_encodermode_ti12,tim_icpolarity_rising,tim_icpolarity_rising);
Set timer work in Encoder interface mode.
Tim_itconfig (tim1,tim_it_update,enable);
Tim_clearitpendingbit (tim1,tim_it_update);
Tim_clearflag (tim1,tim_flag_update); Tim_setcounter (tim1,0);
Set the Count initial value tim_cmd (tim1,enable);
}
The experiment uses the E6A2-CWZ5C encoder, the resolution is 500/R, the timer is TI1 and TI2 double edge count, the final count always remains at 2000, the theoretical value should be 1000. If there is an experiment, please let us know the reason, often thanks.