Stm32 Startup file parsing

; ******************** (C) COPYRIGHT STMicroelectronics ********************; * File Name:stm32f10x_vector. s; * AUTHOR:MCD application Team; * version:v2.0.2; * date:07/11/2008; * DESCRI 
ption:stm32f10x vector table for RVMDK toolchain. * This module performs:; *-Set the initial SP; *-Set T                      He initial PC = = reset_handler; *-Set the vector table entries with the exceptions ISR address; * -Configure external SRAM mounted on stm3210e-eval board; * To is used as data Memory (optional, to is enabled by user); *-Branches to __main in the C library (which eventually;
* Calls main ()). * After Reset the CORTEXM3 processor are in Thread mode,; * Priority is Privileg
Ed, and the Stack is set to Main. ; * <<&Lt Use Configuration Wizard in Context Menu >>> ************************************************************** *****************
; The PRESENT FIRMWARE which is for GUIDANCE only AIMS at providing CUSTOMERS;
With CODING information regarding their products in ORDER for them to SAVE time. ; As A RESULT, STMicroelectronics shall not being HELD liable for any DIRECT,; INDIRECT OR consequential damages with RESPECT to any CLAIMS arising from the; CONTENT of SUCH FIRMWARE and/or the use made by CUSTOMERS of the CODING;
Information CONTAINED herein in CONNECTION with their products. ;*******************************************************************************

; If you need to use external SRAM mounted on Stm3210e-eval board as data memory,; Change the following define value to ' 1 ' (or choose ENABLE in Configuration Wizard window);//<o> External SRAM Configuration <0=> DISABLE <1=> ENABLE//Defines whether external SRAM is used, 1 is used, 0 is not used, and this statement is equivalent to the expression in C: #define Data_in_Extsram data_in_extsram EQU 0//definition stack space size is 0x00000400 bytes, i.e. 1kB stack_size EQU 0x00000400// Pseudo-directive Area area stack, Noinit, READWRITE, align=3//Open a memory space of size stack_size as stack stack_mem space St Ack_size heap_size EQU 0x00000400 area Heap, Noinit, READWRITE, align=3//marking __heap_base
, which represents the heap space start address __heap_base//opens up a memory space of size heap_size as a heap.
Heap_mem space Heap_size//designator __heap_limit, which represents the end address of the heap space. __heap_limit//tells the compiler to use the thumb instruction set thumb//tells the compiler to align to 8-byte Prese The RVE8//import directive, which indicates that subsequent symbols are defined in an external file, may be used by the following symbols;
                 Import exceptions Handlers import nmiexception import hardfaultexception
                 Import memmanageexception import busfaultexception import usagefaultexception Import Svchandler Import Debugmonitor IMPORT pendsvc Import systickhandler import wwdg_irqhandler import PVD _irqhandler Import tamper_irqhandler import rtc_irqhandler import FL  Ash_irqhandler Import rcc_irqhandler Import exti0_irqhandler Import Exti1_irqhandler Import exti2_irqhandler Import Exti3_irqhandler Impo
                 RT exti4_irqhandler import dma1_channel1_irqhandler Import Dma1_channel2_irqhandler   Import Dma1_channel3_irqhandler Import Dma1_channel4_irqhandler Import Dma1_channel5_irqhandler Import Dma1_channel6_irqhandler Import Dma1_channel7_irqhan  Dler Import adc1_2_irqhandler Import usb_hp_can_tx_irqhandler Import Usb_lp_can_rx0_irqhandlER import can_rx1_irqhandler import can_sce_irqhandler import exti9_ 5_irqhandler Import tim1_brk_irqhandler Import Tim1_up_irqhandler IMP
                 ORT tim1_trg_com_irqhandler import tim1_cc_irqhandler Import Tim2_irqhandler
                 Import tim3_irqhandler import Tim4_irqhandler import I2c1_ev_irqhandler Import i2c1_er_irqhandler import I2c2_ev_irqhandler import I2c2_er_irqha Ndler Import spi1_irqhandler import spi2_irqhandler import usart1_ir Qhandler Import usart2_irqhandler import usart3_irqhandler import EX
                 Ti15_10_irqhandler Import Rtcalarm_irqhandler Import Usbwakeup_irqhandler IMPORT Tim8_brk_irQhandler Import tim8_up_irqhandler Import Tim8_trg_com_irqhandler IMP
                 ORT tim8_cc_irqhandler import adc3_irqhandler Import Fsmc_irqhandler
                 Import sdio_irqhandler import Tim5_irqhandler import Spi3_irqhandler
                 Import uart4_irqhandler import Uart5_irqhandler import Tim6_irqhandler Import tim7_irqhandler import Dma2_channel1_irqhandler import Dma2_channel2_irqh Andler import dma2_channel3_irqhandler import Dma2_channel4_5_irqhandler; *********** ********************************************************************
; Fill-up the Vector Table entries with the exceptions ISR address; ****************************************************** Defines a read-only data segment, which is actually located in the code area (assuming that stm32 is booting from flash, the starting address of this data segment is0x80000000) area RESET, DATA, READONLY//To declare __vectors as a global label so that external files can use these labels EXPORT __vectors//designator __vectors indicates interrupt vector table entry address __vectors DCD __initial_sp; Top of Stack DCD reset_handler DCD nmiexception DCD Hardfaultexcepti On DCD memmanageexception DCD busfaultexception DCD usagefaultexcept Ion DCD 0; Reserved DCD 0; Reserved DCD 0; Reserved DCD 0; Reserved DCD svchandler DCD debugmonitor DCD 0;
                 Reserved DCD pendsvc DCD systickhandler DCD Wwdg_irqhandler
    DCD Pvd_irqhandler DCD Tamper_irqhandler             DCD rtc_irqhandler DCD Flash_irqhandler DCD Rcc_irqhandler DCD exti0_irqhandler DCD exti1_irqhandler DCD exti2_irqhandler D
                 CD exti3_irqhandler DCD Exti4_irqhandler DCD Dma1_channel1_irqhandler DCD dma1_channel2_irqhandler DCD Dma1_channel3_irqhandler DCD Dma1_channel4_irqhand Ler DCD dma1_channel5_irqhandler DCD dma1_channel6_irqhandler DCD DM
                 A1_channel7_irqhandler DCD Adc1_2_irqhandler DCD Usb_hp_can_tx_irqhandler
                 DCD usb_lp_can_rx0_irqhandler DCD Can_rx1_irqhandler DCD Can_sce_irqhandler
                 DCD exti9_5_irqhandler DCD Tim1_brk_irqhandler DCD Tim1_up_irqhandler DCD TIM1_trg_com_irqhandler DCD tim1_cc_irqhandler DCD tim2_irqhandler DCD T Im3_irqhandler DCD tim4_irqhandler DCD i2c1_ev_irqhandler DCD i2c1_e R_irqhandler DCD i2c2_ev_irqhandler DCD i2c2_er_irqhandler DCD spi1_ Irqhandler DCD spi2_irqhandler DCD usart1_irqhandler DCD USART2_IRQH Andler DCD usart3_irqhandler DCD exti15_10_irqhandler DCD rtcalarm_i Rqhandler DCD usbwakeup_irqhandler DCD tim8_brk_irqhandler DCD TIM8   _up_irqhandler DCD tim8_trg_com_irqhandler DCD tim8_cc_irqhandler DCD Adc3_irqhandler DCD fsmc_irqhandler DCD sdio_irqhandler DCD tim5_i
              Rqhandler   DCD spi3_irqhandler DCD uart4_irqhandler DCD uart5_irqhandler DCD Tim6_irqhandler DCD tim7_irqhandler DCD dma2_channel1_irqhandler DC D dma2_channel2_irqhandler DCD Dma2_channel3_irqhandler DCD dma2_channel4_5_irqhandle R Area |. Text|, CODE, READONLY; Reset handler routine//Reset interrupt Service program, PROC ... ENDP structure represents the start and end of a program Reset_handler PROC EXPORT Reset_handler//if~~~endif as a precompiled structure to determine whether to use external SRAM, defined in the first row For "Do not use" IF Data_in_extsram = = 1; FSMC Bank1 nor/sram3 is used for the stm3210e-eval, if another Bank is; Required, then adjust the Register Addresses;
                         Enable FSMC Clock Ldr r0,= 0x00000114 ldr r1,= 0x40021014 STR R0,[R1];
     Enable Gpiod, Gpioe, gpiof and Gpiog clocks                    Ldr r0,= 0x000001e0 ldr r1,= 0x40021018 STR R0,[R1] ; SRAM Data lines, NOE and nwe configuration; SRAM Address lines configuration; NOE and NWE configuration; NE3 configuration;
                         NBL0, NBL1 configuration Ldr r0,= 0x44bb44bb LDR r1,= 0x40011400 STR R0,[r1] Ldr r0,= 0xBBBBBBBB LDR r1,= 
                         0x40011404 STR R0,[r1] LDR r0,= 0XB44444BB 
                         Ldr r1,= 0x40011800 STR r0,[r1] Ldr r0,= 0xBBBBBBBB Ldr r1,= 0x40011804 STR r0,[r1] LDR r0,= 0        

                      X44BBBBBB LDR r1,= 0x40011c00 STR R0,[R1]   Ldr r0,= 0xbbbb4444 ldr r1,= 0x40011c04 STR R0,[R1]        

                         Ldr r0,= 0x44bbbbbb ldr r1,= 0x40012000 STR R0,[R1]
                         Ldr r0,= 0x44444b44 Ldr r1,= 0x40012004 STR R0,[R1]; FSMC Configuration;
                        Enable FSMC bank1_sram Bank ldr r0,= 0x00001011 LDR r1,= 0xa0000010 
                        STR R0,[r1] Ldr r0,= 0x00000200 LDR r1,= 0xa0000014 STR R0,[r1] ENDIF IMPORT __main L DR R0, =__main BX R0 ENDP ALIGN; *************************** ****************************************************
; User Stack and Heap initialization; **********IF:D Ef:__microlib

                 Export __INITIAL_SP export __heap_base export __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user
                 _initial_stackheap Ldr R0, = Heap_mem Ldr R1, = (Stack_mem + stack_size)

                 Ldr R2, = (Heap_mem + heap_size) LDR R3, = Stack_mem BX LR ALIGN ENDIF END; ******************* (C) COPYRIGHT Stmicroelectron ICS *****end of file***** area directive: pseudo-directives for defining code snippets or data segments, followed by property labels. One of the more important of the label is "READONLY" or "READWRITE", where "READONLY" means that the segment is a read-only property, contact the STM32 internal storage media, the segment with read-only attributes is saved in the Flash area, that is, after the 0x8000000 address. The "READWRITE" indicates that the segment is a "read/write" attribute, which means that the read-write segment is stored in the SRAM area, which is the 0x2000000 address. The interrupt vector table is placed in the flash fetch, which is the first data in the Flash area of the entire startup code. BecauseThis can be an important message: The 0x8000000 address holds the stack top address __initial_sp,0x8000004 address is the reset interrupt vector reset_handler (STM3 use 32-bit bus, storage space 4-byte alignment) DCD directive: The function is to open up a space, its meaning is equivalent to the address in the C language "&" __main designator does not represent the C program in the main function of the entry address, __main label represents a C/s standard real-time library function in a initialization subroutine __main the entry address.

      One of the main functions of the program is to initialize the stack. Finally summarizes the Stm32 startup file and the boot process: first defines the stack and the heap size, and establishes the interrupt vector table at the beginning of the code area, the first table entry is the top address of the stack, and the second table entry is the Reset interrupt Service entry address. Then, in the Reset Interrupt service program, jump to the C/C + + standard real-time library's __main function, complete the initialization of the stack, etc., jump to the main function in the C file to start the program.