STM32 System Startup File analysis

STM32 Startup Code Analysis (assembly code) selection of startup codeAccording to their own chip selection, choose the following different boot files, due to different capacity of the boot file definition of the peripheral interrupt vector address in the number of different, such as small capacity of the definition of usart1~3 and large capacity inside is usart1~5, so, The defined 4 and 5 serial-port interrupts are not found in the vector table and will jump to B. Death cycle.

Startup_stm32f10x_ld.s
Startup_stm32f10x_md.s
Startup_stm32f10x_hd.s
Among them, Ld.s is suitable for small-capacity products; Md.s is suitable for medium-capacity products; HD is suitable for large-capacity products;
The capacity here refers to the size of the Flash. The method is as follows:
Small capacity: flash≤32k
Medium Capacity: 64k≤flash≤128k
Large capacity: 256k≤flash boot code source Comment analysis (V3.5.0 version firmware here)

Because the startup code is assembly code, the following code uses//double slash to make comments just to be able to read more clearly.

;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name          : startup_stm32f10x_hd.s
;* Author             : MCD Application Team
;* Version            : V3.5.0
;* Date               : 11-March-2011
;* Description        : STM32F10x High Density Devices vector table for MDK-ARM
;*                      toolchain.
;*                      This module performs:
;*                      - Set the initial SP
;*                      - Set the initial PC == Reset_Handler
;*                      - Set the vector table entries with the exceptions ISR address
;*                      - Configure the clock system and also configure the external
;*                        SRAM mounted on STM3210E-EVAL board to be used as data
;*                        memory (optional, to be enabled by user)
;*                      - Branches to __main in the C library (which eventually
;*                        calls main()).
;*                      After Reset the CortexM3 processor is in Thread mode,
;*                      priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
//Stack size definition, equivalent to 1kbyte of macro definition in C language
Stack_Size      EQU     0x00000400
//Define the stack segment, 8 bytes aligned, note that it is read-write.. Our flash memory can only be written after erasing, which is a problem,
//It shows that our stack segment can not be arranged on flash memory, so where is it arranged. It's the internal 20K SRAM, of course.
AREA    STACK, NOINIT, READWRITE, ALIGN=3
//Stack? MEM is the bottom of the stack. Space means to store stack? Size allocation units
Stack_Mem       SPACE   Stack_Size
//__Initial? SP is obviously the address at the top of the stack
__initial_sp
; <h> Heap Configuration
;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
//Here is the allocation of heap space on SRAM with the size of 512byte
Heap_Size       EQU     0x00000200
AREA    HEAP, NOINIT, READWRITE, ALIGN=3
//__Heap base and heap MEM are heap start addresses
__heap_base
Heap_Mem        SPACE   Heap_Size
//__Heap limit is the end address of the heap
__heap_limit
//8-byte alignment, which is required in keil
PRESERVE8
//The thumb instruction set is used, but Cortex-M3 is the thumb-2 version, with both 16 bit and 32-bit instructions
THUMB
; Vector Table Mapped to Address 0 at Reset
//Read only snippet
AREA    RESET, DATA, READONLY
//The starting address of the exported vectors interrupt vector table is equivalent to the starting address that can be accessed when declaring vectors as a global variable and other files
EXPORT  __Vectors
EXPORT  __Vectors_End
EXPORT  __Vectors_Size
//As I said before, 0x0 address must be placed at the top of the stack
__Vectors       DCD     __initial_sp               ; Top of Stack
//Next, there are some exception vector tables. When the exception occurs, the PC will jump here to execute
DCD     Reset_Handler              ; Reset Handler( 0x0000 0004)
DCD     NMI_Handler                ; NMI Handler
DCD     HardFault_Handler          ; Hard Fault Handler
DCD     MemManage_Handler          ; MPU Fault Handler
DCD     BusFault_Handler           ; Bus Fault Handler
DCD     UsageFault_Handler         ; Usage Fault Handler
DCD     0                          ; Reserved
DCD     0                          ; Reserved
DCD     0                          ; Reserved
DCD     0                          ; Reserved
DCD     SVC_Handler                ; SVCall Handler
DCD     DebugMon_Handler           ; Debug Monitor Handler
DCD     0                          ; Reserved
DCD     PendSV_Handler             ; PendSV Handler
DCD     SysTick_Handler            ; SysTick Handler
//Here is the vector table of external interrupts
; External Interrupts
DCD     WWDG_IRQHandler            ; Window Watchdog
DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
DCD     TAMPER_IRQHandler          ; Tamper
DCD     RTC_IRQHandler             ; RTC
DCD     FLASH_IRQHandler           ; Flash
DCD     RCC_IRQHandler             ; RCC
DCD     EXTI0_IRQHandler           ; EXTI Line 0
DCD     EXTI1_IRQHandler           ; EXTI Line 1
DCD     EXTI2_IRQHandler           ; EXTI Line 2
DCD     EXTI3_IRQHandler           ; EXTI Line 3
DCD     EXTI4_IRQHandler           ; EXTI Line 4
DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
DCD     ADC1_2_IRQHandler          ; ADC1 &amp; ADC2
DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
DCD     TIM1_UP_IRQHandler         ; TIM1 Update
DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
DCD     TIM2_IRQHandler            ; TIM2
DCD     TIM3_IRQHandler            ; TIM3
DCD     TIM4_IRQHandler            ; TIM4
DCD     I2C1_EV_IRQHandler         ; I2C1 Event
DCD     I2C1_ER_IRQHandler         ; I2C1 Error
DCD     I2C2_EV_IRQHandler         ; I2C2 Event
DCD     I2C2_ER_IRQHandler         ; I2C2 Error
DCD     SPI1_IRQHandler            ; SPI1
DCD     SPI2_IRQHandler            ; SPI2
DCD     USART1_IRQHandler          ; USART1
DCD     USART2_IRQHandler          ; USART2
DCD     USART3_IRQHandler          ; USART3
DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
DCD     RTCAlarm_IRQHandler        ; RTC Alarm through EXTI Line
DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
DCD     TIM8_BRK_IRQHandler        ; TIM8 Break
DCD     TIM8_UP_IRQHandler         ; TIM8 Update
DCD     TIM8_TRG_COM_IRQHandler    ; TIM8 Trigger and Commutation
DCD     TIM8_CC_IRQHandler         ; TIM8 Capture Compare
DCD     ADC3_IRQHandler            ; ADC3
DCD     FSMC_IRQHandler            ; FSMC
DCD     SDIO_IRQHandler            ; SDIO
DCD     TIM5_IRQHandler            ; TIM5
DCD     SPI3_IRQHandler            ; SPI3
DCD     UART4_IRQHandler           ; UART4
DCD     UART5_IRQHandler           ; UART5
DCD     TIM6_IRQHandler            ; TIM6
DCD     TIM7_IRQHandler            ; TIM7
DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
DCD     DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 &amp; Channel5
__Vectors_End
__Vectors_Size  EQU  __Vectors_End - __Vectors
//Declare snippet. Text|is the agreed snippet name
AREA    |.text|, CODE, READONLY
; Reset handler
//Function pointer to interrupt exception vector
Reset_Handler   PROC
//Here, the symbol [weak] indicates that if there is an external symbol with the same name, the external symbol with the same name takes precedence
EXPORT  Reset_Handler             [WEAK]
//First, skip to the systeminit function to set the system clock RCC initialization and flash vector interrupt.
//__The start of the main label is not the main function in our c language, but the entry address of the initialization subroutine \,
//One of the main functions of this program is to initialize the stack (for our program, it is to jump to the following "user" initial "stackheap label for initial
//Initializes the stack), initializes the image file, and finally jumps to the main function of the C program.
IMPORT  __main
IMPORT  SystemInit
LDR     R0, =SystemInit
BLX R0
LDR     R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
//The following is the function address of other vectors. It's just a simple loop, and it doesn't do any processing. However, it's interesting that they all export [WEAK],
//Therefore, when we want to set the interrupt vector function of the exception, the label with the same name we set shall prevail, which is the external interrupts we often write in keil
//However, when the interrupt function without setting this exception causes the interrupt, the program will die at the interrupt function entry.
NMI_Handler     PROC
EXPORT  NMI_Handler                [WEAK]
B.
ENDP
HardFault_Handler\
PROC
EXPORT  HardFault_Handler          [WEAK]
B.
ENDP
MemManage_Handler\
PROC
EXPORT  MemManage_Handler          [WEAK]
B.
ENDP
BusFault_Handler\
PROC
EXPORT  BusFault_Handler           [WEAK]
B.
ENDP
UsageFault_Handler\
PROC
EXPORT  UsageFault_Handler         [WEAK]
B.
ENDP
SVC_Handler     PROC
EXPORT  SVC_Handler                [WEAK]
B.
ENDP
DebugMon_Handler\
PROC
EXPORT  DebugMon_Handler           [WEAK]
B.
ENDP
PendSV_Handler  PROC
EXPORT  PendSV_Handler             [WEAK]
B.
ENDP
SysTick_Handler PROC
EXPORT  SysTick_Handler            [WEAK]
B.
ENDP
Default_Handler PROC
EXPORT  WWDG_IRQHandler            [WEAK]
EXPORT  PVD_IRQHandler             [WEAK]
EXPORT  TAMPER_IRQHandler          [WEAK]
EXPORT  RTC_IRQHandler             [WEAK]
EXPORT  FLASH_IRQHandler           [WEAK]
EXPORT  RCC_IRQHandler             [WEAK]
EXPORT  EXTI0_IRQHandler           [WEAK]
EXPORT  EXTI1_IRQHandler           [WEAK]
EXPORT  EXTI2_IRQHandler           [WEAK]
EXPORT  EXTI3_IRQHandler           [WEAK]
EXPORT  EXTI4_IRQHandler           [WEAK]
EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
EXPORT  ADC1_2_IRQHandler          [WEAK]
EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT  CAN1_RX1_IRQHandler        [WEAK]
EXPORT  CAN1_SCE_IRQHandler        [WEAK]
EXPORT  EXTI9_5_IRQHandler         [WEAK]
EXPORT  TIM1_BRK_IRQHandler        [WEAK]
EXPORT  TIM1_UP_IRQHandler         [WEAK]
EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
EXPORT  TIM1_CC_IRQHandler         [WEAK]
EXPORT  TIM2_IRQHandler            [WEAK]
EXPORT  TIM3_IRQHandler            [WEAK]
EXPORT  TIM4_IRQHandler            [WEAK]
EXPORT  I2C1_EV_IRQHandler         [WEAK]
EXPORT  I2C1_ER_IRQHandler         [WEAK]
EXPORT  I2C2_EV_IRQHandler         [WEAK]
EXPORT  I2C2_ER_IRQHandler         [WEAK]
EXPORT  SPI1_IRQHandler            [WEAK]
EXPORT  SPI2_IRQHandler            [WEAK]
EXPORT  USART1_IRQHandler          [WEAK]
EXPORT  USART2_IRQHandler          [WEAK]
EXPORT  USART3_IRQHandler          [WEAK]
EXPORT  EXTI15_10_IRQHandler       [WEAK]
EXPORT  RTCAlarm_IRQHandler        [WEAK]
EXPORT  USBWakeUp_IRQHandler       [WEAK]
EXPORT  TIM8_BRK_IRQHandler        [WEAK]
EXPORT  TIM8_UP_IRQHandler         [WEAK]
EXPORT  TIM8_TRG_COM_IRQHandler    [WEAK]
EXPORT  TIM8_CC_IRQHandler         [WEAK]
EXPORT  ADC3_IRQHandler            [WEAK]
EXPORT  FSMC_IRQHandler            [WEAK]
EXPORT  SDIO_IRQHandler            [WEAK]
EXPORT  TIM5_IRQHandler            [WEAK]
EXPORT  SPI3_IRQHandler            [WEAK]
EXPORT  UART4_IRQHandler           [WEAK]
EXPORT  UART5_IRQHandler           [WEAK]
EXPORT  TIM6_IRQHandler            [WEAK]
EXPORT  TIM7_IRQHandler            [WEAK]
EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
EXPORT  DMA2_Channel4_5_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
TIM8_BRK_IRQHandler
TIM8_UP_IRQHandler
TIM8_TRG_COM_IRQHandler
TIM8_CC_IRQHandler
ADC3_IRQHandler
FSMC_IRQHandler
SDIO_IRQHandler
TIM5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TIM6_IRQHandler
TIM7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
B.
ENDP
//Word alignment (32-bit)
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF      :DEF:__MICROLIB
//Export stack top, stack head and stack tail addresses
EXPORT  __initial_sp
EXPORT  __heap_base
EXPORT  __heap_limit
ELSE
IMPORT  __use_two_region_memory
//A small function that we mentioned earlier will be called in main to initialize the stack
EXPORT  __user_initial_stackheap
__user_initial_stackheap
//Pass in these stack related addresses as parameters
LDR     R0, =  Heap_Mem
LDR     R1, =(Stack_Mem + Stack_Size)
LDR     R2, = (Heap_Mem +  Heap_Size)
LDR     R3, = Stack_Mem
/ / return the place where __user_initial_stackheap is invoked in __mian.
BX LR
ALIGN
ENDIF
//End of assembly
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****